Vector locked loop
AssigneeHewlett-Packard Company
InventorMarcus K. DaSilva
Life of this patent
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Abstract
A vector locked loop is disclosed having a topology somewhat similar to two cross coupled phase locked loops, but wherein both magnitude and phase are used as feedback signals. The output signal is generated by combining the outputs of two VCOs in a combiner network. This output signal is fed back to the input, where phase and magnitude detectors are used to generate error signals. These error signals are processed to yield control signals for controlling the frequencies of the two VCOs. The vector locked loop can be adapted for a number of applications, including frequency translation, modulation (phase, amplitude or arbitrary), and high efficiency linear power amplification.
Claims18
A circuit comprising;
- first and second oscillators, the frequency of each being responsive to a signal applied to a control input thereof;
- a combiner circuit having inputs coupled to outputs of the first and second oscillators;
- a phase detector and an amplitude detector, an output of the combiner being coupled to a first input of the phase detector and to a first input of the magnitude detector;
- a circuit block having a first input coupled to an output of the phase detector and a second input coupled to an output of the magnitude detector, the circuit block having first and second outputs coupled to the control inputs of the first and second oscillators, respectively, the signals provided by the circuit block on the first and second outputs being related to the signals provided to the circuit block on the first and second inputs according to a transfer matrix;
- and
- a circuit input terminal coupled to a second input of the phase detector and to a second input of the magnitude detector.
A method of signal generation comprising the steps:
- providing an input signal;
- generating first and second oscillator signals;
- combining the first and second oscillator signals to yield an output signal;
- comparing the phase and magnitude of the output signal with that of the input signal and producing phase and magnitude error signals corresponding thereto;
- and
- generating first and second oscillator control signals in response to the phase and magnitude error signals, and controlling the first and second oscillators in response to said control signals.
A method of generating an arbitrarily modulated signal comprising the steps:
- providing an input carrier signal;
- generating first and second oscillator signals;
- combining the first and second oscillator signals to yield an output signal;
- comparing the phase and magnitude of the output signal with that of the input signal and producing phase and magnitude error signals corresponding thereto;
- generating phase and amplitude modulation signals corresponding to a desired vector modulation format;
- summing the phase modulation signal with the phase error signal to produce a summed phase error signal;
- summing the amplitude modulation signal with the magnitude error signal to produce a summed magnitude error signal;
- generating a difference control signal from the summed phase and magnitude error signals and controlling the first oscillator signal in response thereto;
- and
- generating a sum control signal from the summed phase and magnitude error signals and controlling the second oscillator signal in response thereto.
Dependencies are inferred from the claim text.