CMOS digital clock and data recovery circuit

An integrated circuit having a reference clock with period T.sub.p for detecting and recovering signals from a transmission line coupled to at least one transmitting station having a clock period T.sub.t, including a D-type flip-flop and a synchronous delay line (SDL) coupled to a waveform digitizer and to a waveform synthesizer, said SDL providing timing pulses to said waveform digitizer and to said waveform synthesizer, said waveform digitizer receiving said signals for converting said signals into a digitized signal, said signal being encoded with clock and data information in a single stream of pulses, said stream of pulses having bit-center transitions and bit boundary transitions, said D-type flip-flop outputting said data information of said signals, said integrated circuit comprising:

• a transition detecting means coupled to said waveform digitizer for extracting the location of transitions of said signals received by said waveform digitizer;
• a masking means coupled to said transition detecting means and said waveform synthesizer for isolating said bit-center transitions from said signals;
• said waveform synthesizer providing mask bits to said masking means for masking out bit-boundary transitions;
• at least two encoding means coupled to said masking means for encoding the locations of bit-center transitions of said signal, said encoding means being further coupled to an adding means and an L-type register means for averaging the locations of the bit-center transitions of said signals;
• Means for generating a variable input signal;
• a filtering means coupled to said L-type register for locking on said digitized signal and for filtering out jitter from said signals, said filtering means further said receiving a variable time input, said filtering means being further coupled to said waveform synthesizer for synthesizing said clock information for said integrated circuit;
• and
• a delaying means coupled to said D-type flip-flop, wherein said D-type flip-flop is used for delaying said data information of said signals for synchronizing the clock information from said waveform synthesizer with said data information of said signals.