Hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip

A hermetically sealed, packaged semiconductor chip comprising:

• said chip, said chip having a contact pad on a first surface thereof;
• and
• a package within which said chip is hermetically sealed, said package including:
• a lid comprising an electrically insulating substrate having first and second opposed major surfaces and an aperture extending therethrough from said first major surface to said second major surface,
• a conductor extending through the aperture in said lid and spaced from the wall of said aperture,
• an external lead, said external lead being electrically connected to said contact pad of said chip via said conductor,
• a hermetic seal including a conductive material bonded to said first major surface of said substrate and sealing said aperture, and
• said external lead being electrically connected to said conductive material of said hermetic seal, and said conductor being electrically connected to said conductive material proximate said first major surface of said substrate and to said contact pad proximate said second major surface of said substrate.

A packaged semiconductor chip comprising:

• said chip, said chip having a contact pad on a first surface thereof;
• a lid comprising an electrically insulating substrate, said substrate having an aperture therein and being disposed with a major surface thereof substantially parallel to said first surface of said chip, said aperture intersecting said major surface;
• and
• a conductive lead disposed within said aperture and electrically continuous with said contact pad for connecting said contact pad to circuitry external to said package, said conductive lead being spaced from a portion of the wall of said aperture.

A packaged semiconductor chip comprising:

• said chip, said chip having a contact pad on a first surface thereof;
• a lid comprising an electrically insulating substrate, said substrate having an aperture therein and being disposed with a major surface thereof substantially parallel to said first surface of said chip, said aperture intersecting said major surface;
• and
• a conductive lead disposed within said aperture and electrically continuous with said contact pad for connecting said contact pad to circuitry external to said package, said conductive lead being spaced from at least some parts of the wall of said aperture.

A packaged semiconductor chip comprising:

• said chip, said chip having a contact pad on a first surface thereof;
• a lid comprising an electrically insulating substrate, said substrate having an aperture therein and being disposed with a major surface thereof substantially parallel to said first surface of said chip, said aperture intersecting said major surface and being disposed in alignment with said contact pad;
• and
• a conductive lead disposed within said aperture and electrically continuous with said contact pad for connecting said contact pad to circuitry external to said package, said conductive lead being spaced from a portion of the wall of said aperture.

A packaged semiconductor chip comprising:

• said chip, said chip having a contact pad on a first surface thereof;
• a lid comprising an electrically insulating substrate, said substrate having an aperture therein and being disposed with a major surface thereof substantially parallel to said first surface of said chip, said aperture intersecting said major surface;
• and
• a conductive lead disposed within said aperture and electrically continuous with said contact pad for connecting said contact pad to circuitry external to said package, said conductive lead being spaced from a portion of the wall of said aperture, said conductive lead being bonded to said contact pad by a bond which includes a plurality of conductive bumps of a first conductive material solderless bonded to said chip pad, the bulk of said chip pad being a conductive material other than said first conductive material.

A hermetically packaged semiconductor chip comprising:

• said chip, said chip having at least one contact pad on a first surface thereof;
• a plurality of conductive pellets each bonded to one of said at least one contact pad on said first surface;
• a lid including an electrically insulating substrate disposed adjacent to said first surface, said substrate having a first major surface and a second major surface opposed thereto, and said substrate having a plurality of apertures therein extending from said first major surface to said second major surface, each of said conductive pellets being at least partially disposed within one of said apertures;
• and
• a conductive foil extending across at least one of said apertures, said conductive foil being sealingly adhered to one of said first and second major substrate surfaces to provide a hermetic seal between said chip and the outside of said package.

A lid for a hermetic semiconductor device package comprising:

• a ceramic substrate having opposed major surfaces and an aperture therein which extends between said major surfaces;
• a sealing frame disposed on one of said major surfaces of said substrate;
• and
• a conductive foil bonded to one of said major surfaces of said substrate to extend across said aperture and hermetically seal said aperture, said foil being compliant where it extends across said aperture.