Plastic pin grid array package
AssigneeAT&T Bell Laboratories
InventorCharles Cohn
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AssigneeAT&T Bell Laboratories
InventorCharles Cohn
Estimating the term…
This invention is a simple and effective process of producing a plastic pin grid array package having an encapsulated device and a heat sink forming a unitary component of a main planar body of the package. The process includes fabrication of a laminated planar main body having outer plastic sheets provided with metallizations, a metal sheet of high thermal conductivity, and plastic sheets positioned intermediate the outer plastic sheets and the metal sheet, the metal sheet having clearance holes filled with plugs of the material of the intermediate plastic sheets, a plurality of plated-through holes (PTHs) formed in the main body and terminal pins secured in the PTHs. Some of the PTHs contacting the metal sheet and some passing through the plugs in the clearance holes out of contact with the metal sheet. The device, such as an integrated circuit chip, mounted in a recessed cavity in the main body, is in contact with the metal heat-sink. In this manner heat is conducted away from the device by the heat sink and dissipated through the back of the package and those of the terminal pins which are in PTHs contacting the heat sink.
A method of producing a plastic pin grid array package comprising a planar main body member having a top and a bottom surface and a centrally disposed recessed cavity formed in the top surface, an electronic device enclosed in the recessed cavity, a metal heat sink for removal of heat from the device, and a plurality of terminal pins arranged around the recessed cavity, at least some of these pins being electrically connected to pads on said device, which comprises:
Dependencies are inferred from the claim text.
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No related US applications are recorded in the indexed filing history.
Vias, e.g. via plugs: through-vias
Fillings: solid or gel fillings
Details: thermal arrangements, e.g. for cooling, heating or preventing overheating
Structurally associated with non-printed electric components: associated with components mounted in printed circuit boards [PCB], e.g.…
Term ended 22 Jul 2011 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
This invention concerns the fabrication of a Plastic Pin Grid Array (PPGA) Package provided with a heat-dissipating member.
Integrated circuit chips are mounted in plastic packages for a lower cost of packaging as compared with ceramic packages. The plastic packages provide several important advantages for the chip operation as compared with ceramic packages, namely higher current carrying capacity, lower dielectric constant for shorter operational delay times, along with reduced inductance and capacitance; however, the generally inferior heat dissipation experienced with plastic packages remains a problem. This problem is often aggravated by encapsulation techniques in which the chip is mounted in the plastic package whereby additional plastic material is molded around the mounted chip. The need for efficient removal of heat from the packages becomes more pronounced with the advent of more sophisticated integrated chips having a higher degree of integration and higher power densities. Rather elaborate heat sink methods are now commonly used in plastic packages as a means to increase heat dissipation and, thus, to maintain the temperature of the integrated circuit chip within its designed operational limits. An example of a plastic pin grid array integrated circuit package with a heat sink is disclosed in U.S. Pat. No. 4,618,739 issued on Oct. 21, 1986 to Paul R. Theobald. However, the package is fabricated of several separated formed subunits which require numerous processing steps to prepare and assemble into a unitary package.
Accordingly, it is desirable to provide a plastic pin grid array (PPGA) package which will remove effectively the heat from the encapsulated device and which is simple to construct and produce on a mass production basis while avoiding any need for complex heat sinking techniques during the packaging process.
FIG. 1 is a perspective view depicting a plastic pin grid array integrated circuit chip carrier package with a heat-sink of the present invention;
FIG. 2 is a schematic representation of the FIG. 1 package shown in cross-section;
FIG. 3 is an exploded cross-sectional view depicting components of a preassembly of a main body of the package, including a heat sink component prior to a laminating step;
This invention is a process for fabricating Plastic Pin Grid Array (PPGA) packages provided with an efficient removal of heat from an encapsulated IC chip and suitable for mass production. The heat is transferred from the chip to a metal heat sink, unitarily formed into the PWB, and may be removed from the inside of the package by means of pins contacting the heat sink and/or dissipated through the back of the package. The PPGA package provides protection of an integrated circuit (IC) device (a chip or a die) from hostile environments and handling, while simultaneously providing interconnection of the device to a printed wiring board (PWB) and effective heat dissipation.
FIGs. 1 and 2 are, respectively, perspective and cross-sectional schematic representation of an exemplary PPGA package, generally designated as 1. For reasons of clarity the elements of the package are not drawn to scale. PPGA package 1 includes a planar main body of a printed wiring board (PWB), generally designated as 2, metallic pins 3, an IC device 4, an encapsulant retaining dam, 5, and a synthetic organic polymer (hereinafter referred to as "plastic"), 6, encapsulating the device. A plurality of metallized conductors, 7, 8 and 9 are arranged on top, bottom and within the PWB, respectively. A plurality of plated-through holes (PTHs), 10, are provided transversely of the PWB for receiving pins 3 and for interconnecting various conductor levels of the PWB. The pins may project above the surface of the PWB containing the IC device or, alternatively, from the bottom of the PWB (as shown in FIG. 7). Wires, 11, interconnect pads, 12, on the device with conductors 7 on the PWB.
In an exemplary embodiment, PWB 2 includes a plastic top body 15, a metal heat-sink 16, a plastic bottom body, 17, and plastic bonding sheets 18. Preformed clearance holes 19 are provided at selected positions in the heat sink 16 to permit passage of pins through the PWB without making an electrical contact with the heat sink. The clearance holes are filled with plugs, 20, of the same material as the bonding layers. No clearance holes are provided at those sites where electrical contact between the pins and the heat sink is required.