Digital decimation filter

A digital decimation filter comprising:

• a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q;
• a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter;
• wherein the high order decimation filter and the FIR filter are provided on a single integrated circuit;
• wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier;
• wherein the high order decimation filter is a Hogenauer filter;
• wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section;
• wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section;
• wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages;
• and
• wherein the comb filter stage section includes a plurality of comb filter stages and at least one of the comb filter stages includes a rounder, an output of the rounder being the output of said high order decimation filter, said rounder rounding the decimated output digital data before the decimated output digital data is provided as an input to the FIR filter.

A digital decimation filter comprising:

• a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q;
• a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter;
• wherein the high order decimation filter and the fir filter are provided on a single integrated circuit;
• wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier;
• wherein the high order decimation filter is a Hogenauer filter;
• wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section;
• wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section;
• wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages;
• and
• wherein the comb filter stage section includes a plurality of comb filter stages, and further comprising means coupled to the Hogenauer filter for programmably bypassing at least one of the integrator filter stages and at least one of the comb filter stages.

A digital decimation filter comprising:

• a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q;
• a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter;
• and
• further comprising a data shifter having an input for receiving input digital data and an output coupled to the input of the high order decimation filter, said data shifter shifting input digital data to provide growth bits for the input digital data and producing the shifted input digital data at its output.

A digital decimation filter comprising:

• a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q;
• a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter;
• and
• further comprising means coupled to the high order decimation filter and the FIR filter for programmably bypassing the high order decimation filter or the FIR filter.