High voltage modified cascode circuit
AssigneeGrumman Aerospace Corporation
InventorCarmine F. Vasile
Life of this patent
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Abstract
A new type of high voltage FET circuit has been developed which offers a dramatic improvement in performance as compared to a common source amplifier stage. The new circuit offers inherent performance advantages in both MIC and MMIC power amplifiers. To achieve this end, the FET circuit has a common source FET connected to a common gate FET, with the common source FET having a width substantially greater than that of the common gate FET such that the common source FET does not saturate even when the common gate FET is turned fully on. To provide biasing for the circuit such that its breakdown voltage can be substantially increased, a RC circuit including a connected in parallel diode is used.
Claims16
A cascode circuit comprising:
- an output FET;
- an input FET connected to said output FET, said input FET having a gate width sufficiently greater than the gate width of said output FET to ensure said input FET does not saturate when said output FET is fully turned on;
- and
- biasing means connected to the gate of said output FET to forward bias and thereby increase the breakdown voltage of said output FET.
A cascode circuit comprising:
- a common gate stage having a predetermined gate width and breakdown voltage;
- a common source stage connected to said common gate stage and having a predetermined gate width whose size is sufficiently greater than the predetermined gate width of said common gate stage to prevent current saturation of said common source stage when said common gate stage is turned fully on;
- means for biasing said common gate stage to increase the breakdown voltage of said common gate stage to thereby enhance the operational characteristics of the cascode circuit.
A cascode circuit comprising:
- an output FET;
- at least two input FETs connected in parallel and connected in turn to the output FET, said input FETs having a combined saturation circuit sufficiently greater than the saturation current of said output FET to ensure said input FETs do not saturate when said output FET is turned fully on;
- and
- biasing means connected to said output FET to provide forward biasing and increased breakdown voltage for said output FET.
A cascode circuit comprising:
- a common base stage having a first predetermined gate width and breakdown voltage;
- a common emitter stage connected to said common base stage and having a second predetermined gate width sufficiently greater than said first predetermined gate width to prevent said common emitter stage from current saturation when said common gate stage is turned fully on;
- and
- means for biasing said common base stage to increase its breakdown voltage to thereby enhance the operational characteristics of the cascode circuit.
Dependencies are inferred from the claim text.