Switch interface for determining position of a plurality of switches using a determined time
AssigneeAllied-Signal Inc.
InventorJames W. Spence
Life of this patent
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Abstract
A circuit for interfacing switches to a component which allows the positions of the switches to be determined by the component. The component includes an input port and an output port. A switch network which is a parallel combination of two or more series combinations of a resistor and a switch is connected between the input and output port. A capacitor is connected between the input port and ground. The component determines switch positions by outputting a voltage on the output port and determining the time for the capacitor to charge to a predetermined value. Since each series combination has a unique resistance, the position of the switches therein can be determined in accordance with the capacitor charging time.
Claims15
A switch interface, comprising:
- a first port for selectively outputting a lower and a higher voltage;
- a second port;
- a plurality of series combinations of a switch and a resistor which are connected in a parallel circuit, each of said plurality of series combinations having a unique resistance and each of said switches being in an open or closed position, said parallel circuit having a first node connected to said first port and a second node connected to said second port;
- a capacitor connected between said second port and a node biased at a reference voltage;
- means for determining a time for a voltage at said second port to increase to a predetermined voltage level when said first port changes state from said lower voltage to said higher voltage;
- and
- means for determining said position of each of said switches in accordance with said time.
A method of interfacing a plurality of switches to a component such that the component can determine the positions of each individual switch, the component having an input and an output port initially biased at a LOW voltage, the switch interface having a parallel combination of a plurality of series combinations of a switch and a resistor, the parallel combination being connected between the input and output port, each series combination having a unique resistance, and a capacitor connected between the input port and a node biased at a reference voltage, comprising the steps of:
- outputting a HIGH voltage on the output port;
- determining the time for the capacitor to charge to a predetermined voltage;
- and
- determining the positions of the switches in accordance with the time.
A method of interfacing a plurality of switches to a component such that the component can determine the position of each individual switch, the component having an input and an output port initially biased at a LOW voltage. The switch interface having a parallel combination, of a plurality of series combinations of a switch and a resistor, the parallel combination being connected between the input and output port, each series combination having a unique resistance, and a capacitor connected between the input port and a node biased at a reference voltage, comprising the steps of:
- outputting a HIGH voltage on the output port;
- determining the time for the capacitor to charge to a predetermined level;
- outputting a LOW voltage on the output port;
- determining the time for the capacitor to discharge to a predetermined level;
- and
- determining the positions of the switches in accordance with the charging and discharging times.
Dependencies are inferred from the claim text.