Method and apparatus for high precision weighted random pattern generation

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said combining means comprises a plurality of serially connected stages each having a plurality of inputs and an output, the output of an immediately preceding stage being connected to one of said plurality of inputs of an immediately succeeding stage;
• a respective bit of said multibit weighting factors and a respective bit of said random bit patterns being connected to the inputs of a respective one of said stages.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said combining means comprises a plurality of serially connected multiplexor gates, each of said serially connected multiplexor gates having first and second data inputs, a control input and an output, with the binary value of said output being one of the binary value of said first and said second data inputs depending upon the binary value of said control input;
• the output of an immediately preceding stage being connected to the first data input of an immediately succeeding stage;
• a respective bit of said multibit weighting factors being connected to a respective one of said second data inputs;
• and a respective bit of said random bit pattern being connected to a respective one of said control inputs.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said combining means combines said multibit weighting factors and said random bit pattern according to the following boolean function:
• Y.sup.0 =W.sup.r ;
• Y.sup.i =A.sup.i-1 +A.sup.i-1 W.sup.i-1,i=1 . . . r;
• where r is the desired precision, A.sup.i is one bit of said random pattern, W.sup.i is one bit of the selected one of said weighting factors, Y.sup.i is the result of combining A.sup.i and W.sup.i except for Y.sup.0 which is set to W.sup.r, and Y.sup.r is the result of the final iteration for generating one bit of said weighted random pattern.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said combining means combines said multibit weighting factors and said random bit pattern according to the following boolean function:
• ##EQU4## where r is the desired precision, A.sup.i is a bit of said random pattern, W.sup.i is one bit of the selected one of said weighting factors and Z.sub.j is the generated weighted random bit.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• a complex digital logic circuit to be tested, said complex digital logic circuit being operationally connected to said combining means;
• said weighted random pattern generation system being fabricated on a single integrated circuit chip for performing boundary scan testing of said complex digital logic circuit which is operationally connected thereto.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said random bit pattern controls the combining of said multibit weighting factors in said combining means.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said combining means combines one of said multibit weighting factors with said random bit pattern in a single clock cycle.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• a register connected to said combining means for storing therein said weighted random pattern formed by said combining means.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said memory comprises a circular memory.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said random pattern generator includes a register for storing said random bit pattern therein, said register being connected to said combining means.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein said random pattern generator comprises a cellular automata register.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein the number of bits in said multibit weighting factors are determined by the desired precision for said weighted random pattern.

A weighted random pattern generation system comprising:

• a memory having a plurality of multibit weighting factors stored therein;
• a random pattern generator for generating a random bit pattern;
• and
• means, connected to said memory and said random pattern generator, for combining said multibit weighting factors with said random bit pattern to form a weighted random pattern;
• wherein bits of said random bit pattern are dependent upon one another, and wherein said weighted random bit pattern generation system further comprises scrambling means, connected between said random bit pattern generator and said combining means, for converting the dependent portions of said random pattern into independent portions.

A weighted random pattern generation method comprising the steps of:

• providing a first multibit weighting factor;
• generating a first multibit random bit pattern;
• combining the first multibit weighting factor and the first multibit random bit pattern to generate a first bit of the weighted random pattern;
• and
• repeating said providing, generating and combining steps upon second and subsequent multibit weighting factors and second and subsequent random bit patterns to generate second and subsequent bits of the weighted random pattern.

A weighted random pattern generation system comprising:

• a random pattern generator for generating a random bit pattern;
• a multibit random pattern source register, connected to said random pattern generator, for storing said random bit pattern;
• a circular memory having a plurality of multibit weighting factors stored therein;
• a multibit weight register, connected to said circular memory, for storing one of said plurality of multibit weighting factors from said circular memory;
• a plurality of serially connected multiplexor gates each having two data inputs, one control input and one data output;
• a respective bit of said multibit random pattern source register being connected to said control input of a respective multiplexor gate;
• a respective bit of said multibit weight register being connected to one of said data inputs of a respective multiplexor gate;
• the data output of an immediately preceding multiplexor gate being connected to the second data input of an immediately succeeding multiplexor gate;
• and
• a weighted random pattern register for storing a weighted random pattern, the output of the last of said plurality of serially connected multiplexor gates being connected to said weighted random pattern register.