Insulated-gate type transistor and semiconductor integrated circuit using such transistor

An insulated-gate semiconductor device formed in a semiconductor body having first and second opposing principal surfaces, comprising:

• a heavily-doped source semiconductor region of a first conductivity type disposed in said body adjacent to said first principal surface;
• a heavily-doped drain semiconductor region of said first conductivity type disposed in said body adjacent to said second principal surface;
• a subdrain semiconductor region of said first conductivity type and a resistivity higher than said drain semiconductor region, disposed from said source region, extending from said first principal surface to said drain region;
• a channel region of a second conductivity type opposite to said first conductivity type and of predetermined resistivity disposed laterally adjacent to said source region at said first principle surface between said source and subdrain regions;
• insulated gate means, including an insulting layer formed on said first principal surface and a conductive layer formed on said insulating layer over at least the channel region for generating a depletion layer extending into said channel region;
• and
• means for limiting the maximum extent of said depletion layer and for defining a current path having a portion in a direction generally parallel to said first principal surface and a portion in a direction transverse to said first principal surface, said means including a subsidiary semiconductor region of said second conductivity type and of a resistivity lower than said predetermined channel resistivity such that said depletion layer will not substantially enter said subsidiary region, said subsidiary regions being disposed in said body between said source and drain region and having a first portion underlying and in contact with the entire bottom face of said source region and a second portion extending in a direction generally parallel to said first principal surface to underlie at least a portion of said channel region;
• said channel region having such dimensions and a resistivity that the potential profile from said source region to said drain region has a barrier which can be controlled by applied voltages of said conductive gate electrode and of said drain region.