Fault-isolating apparatus and method for connecting circuitry

An apparatus for electrically connecting circuitry on a printed circuit board comprising,

• a printed circuit board having a plurality of regions on a major surface thereof, each region having circuitry operatively associated with input and output signal lines, said signal lines being closely spaced conductors on said region in electrical isolation with the signal lines of ann adjacent region,
• a connector member having closely spaced parallel conductive bars, said conductive bars being exposed to contact said major surface of said printed circuit board and having a length and pitch such that said conductive bars are in physical contact with and provide electrical communication between signal lines of adjacent regions when said connector member is mounted to said major surface, and
• means for releasably mounting said connector member to said major surface of said printed circuit board.

An apparatus for electrically connecting circuitry on a printed circuit board comprising,

• a printed circuit board having a plurality of regions on a major surface thereof, each region having circuitry operatively associated with input and output signal lines, said signal lines being closely spaced conductors on said region in electrical isolation with the signal lines of an adjacent region,
• a connector member having closely spaced conductive bars, said conductive bars being exposed to contact said major surface of said printed circuit board and having a length and pitch such that said conductive bars are in physical contact with and provide electrical communication between signal lines of adjacent regions when said connector member is mounted to said major surface, said conductive bars fixed to a substrate of dielectric material, said connector member having a cap coupled to said substrate on a side opposite to said conductive bars, and
• means for releasably mounting said connector member to said major surface of said printed circuit board.

A method for isolating potential faults comprising,

• producing a printed circuit board having first and second circuit regions and patterns of signal lines in each of said circuit regions, said signal lines of said first circuit region being spaced apart from said signal lines of said second circuit region,
• mounting electronic components in said circuit regions, each component being operatively associated with said signal lines of the circuit region in which the component resides and being signal-isolated from components residing in the other circuit region, and
• selectively coupling a connector member having an array of connecting contacts to sad printed circuit board in a position such that a plurality of said connecting contacts each physically contact said signal lines of both of said first and said second circuit regions, thereby providing signal communication between said circuit regions.

The method of claim 19 wherein said producing of said printed circuit board includes designing said printed circuit board to include a third circuit region having a pattern of signal lines adjacent to but spaced apart from a corresponding pattern of said second circuit region, said method further comprising selectively coupling a connector member to said printed circuit board to provide signal communication between said second and third circuit regions.