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AssigneeInternational Business Machines Corporation
InventorSteven L. Gregor
Estimating the term…
A multiprocessor system includes a system of store queues and write buffers in a hierarchical first level and second level memory system including a first level store queue for storing instructions and/or data from a processor of the multiprocessor system prior to storage in a first level of cache, a second level store queue for storing the instructions and/or data from the first level store queue and a plurality of write buffers for storing the instructions and/or data from the second level store queue prior to storage in a second level of cache. The multiprocessor system includes hierarchical levels of caches, including a first level of cache associated with each processor, a single shared second level of cache shared by all the processors, and a third level of main memory connected to the shared second level cache. A first level store queue, associated with each processor, receives the data and/or instructions from its processor and stores the data and/or instructions in the first level of cache. A second level store queue, associated with each processor, receives the data and/or instructions from its first level store queue and temporarily stores the information therein. For sequential stores, the data and/or instructions are stored in corresponding second level write buffers. For non-sequential stores, the data and/or instructions bypass the corresponding second level write buffers and are stored directly in a final L2 cache write buffer. When stored in the second level writer buffers, access to the shared second level cache is requested.
In a multiprocessor system having a plurality of processors including a first processor and at least one second processor, a first level cache connected to each processor, a single second level cache connected to each first level cache and shared by the processors, and a third level main memory connected to the second level cache, a system for queuing and buffering data and/or instructions, comprising:
In a multiprocessor system having a plurality of processors including a first processor and at least one second processor, a first level cache connected to each processor, a single second level cache connected to each first level cache and shared by the processors, and a third level main memory connected to the second level cache, a system for queuing and buffering data and/or instructions, comprising:
In a multiprocessor system having a plurality of processors including a first processor and at least one second processor, a first level cache connected to each processor, a single second level cache connected to each first level cache and shared by the processors, and a third level main memory connected to the second level cache, a system for queuing and buffering data and/or instructions, comprising:
In a multiprocessor system including a first processor and at least one second processor where each processor includes an execution unit and a translation lookaside buffer (TLB), a first level cache (L1 cache) connected to each processor, a first level cache directory (L1 cache directory) associated with each said L1 cache, a first level store queue (L1 store queue) connected to each processor and to its said L1 cache, and a second level store queue (L2 store queue) connected to each said L1 store queue, a method of operating said multiprocessor system, comprising the steps of:
Dependencies are inferred from the claim text.