Method of fabricating cross-point lightly-doped drain-source trench transistor

A process for fabricating a self-aligned, lightly-doped drain/source field effect trench transistor device comprising the steps of:

• Step 1) on semiconductor substrate material having a layer of epitaxial material thereon, implanting dopants to form a retrograde well region in said epitaxial material,
• Step 2) forming oxide isolation regions in the surface of said well region and implanting dopants between said isolation regions to form a diffusion region to provide first drain junction regions,
• Step 3) etching a vertical trench through said diffusion region into said well region,
• Step 4) implanting dopants into the vertical sides of said trench using a low angle oblique ion implantation technique,
• Step 5) forming layers of silicon nitride masking material on the vertical sidewalls of said trench extending below the level of said diffusion region formed in Step 2,
• Step 6) forming self-aligned and lightly doped second drain junction regions on the sidewalls of said vertical trench above said silicon nitride mask layers and form buried source junction below the bottom of said trench by using said low angle oblique ion implantation technique,
• Step 7) growing oxide on said recessed oxide regions and on the bottom of said trench over said source junction,
• Step 8) removing said silicon nitride mask layer from said vertical trench sidewalls and growing a thin gate oxide on said vertical trench sidewalls, and
• Step 9) filling said trench with polysilicon and depositing polysilicon over said filled trench and over said recessed oxide regions and well surface to form transfer gate and wordline elements.