Superconducting analog-to-digital converter with floating four-junction squid bidirectional counter

A superconducting counting analog-to-digital converter, comprising:

• a toggling superconducting quantum interference device (SQUID) quantizer;
• means for applying a varying analog signal to the SQUID quantizer;
• and
• first and second binary counters;
• wherein the quantizer generates up-count and down-count voltage pulses for increasing and decreasing values of the analog signal and the binary counters algebraically count the voltage pulses, increasing the binary count when up-count pulses are received and decreasing the binary count when down-count pulses are received;
• and wherein the quantizer toggles between the two counters at the end of each sampling interval so that one counter can be read while the other counter is counting.

A toggling superconducting quantum interference (SQUID) quantizer for toggling between first and second binary counters, comprising:

• first, second, third and fourth Josephson junctions;
• first and second center-tapped inductances;
• two resistors connected in series between the center-tap terminals of the two inductances;
• means for injecting a constant gate current into the terminal between the two resistors;
• and
• means for applying a varying analog signal to the quantizer;
• wherein the first counter is selected for counting by grounding the terminal between the first and third Josephson junctions and the second counter is selected for counting by grounding the terminal between the second and fourth Josephson junctions;
• and wherein when the first counter is selected for counting, positive incremental changes in the analog signal result in the generation of up-count voltage pulses across the first Josephson junction and negative incremental changes result in the generation of down-count voltage pulses across the third Josephson junction, and when the second counter is selected for counting, positive incremental changes in the analog signal result in the generation of up-count voltage pulses across the second Josephson junction and negative incremental changes result in the generation of down-count voltage pulses across the fourth Josephson junction.

A superconducting counting analog-to-digital converter, comprising:

• a variable-hysteresis superconducting quantum interference device (SQUID) quantizer;
• means for applying a varying analog signal to the SQUID quantizer;
• and
• a binary counter;
• wherein the quantizer generates up-count and down-count voltage pulses for increasing and decreasing values of the analog signal and the binary counter algebraically counts the voltage pulses, increasing the binary count when up-count pulses are received and decreasing the binary count when down-count pulses are received;
• and wherein the hysteresis of the quantizer is controlled, a small hysteresis allowing the quantizer to output the up-count and down-count pulses to the binary counter and a large hysteresis inhibiting the generation of the voltage pulses, thus providing a read period for the counter.

A variable-hysteresis superconducting quantum interference device (SQUID) quantizer, comprising:

• a SQUID quantizer;
• and
• means for varying the hysteresis of the SQUID quantizer;
• wherein a small hysteresis allows the quantizer to generate up-count and down-count voltage pulses and a large hysteresis inhibits the generation of voltage pulses.

A superconducting quantum interference device (SQUID) quantizer for use with a binary counter, comprising:

• first and second Josephson junctions;
• a center-tapped inductance;
• means for supplying a variable gate current to the quantizer;
• and
• means for applying a varying analog signal to the quantizer;
• wherein the hysteresis of the quantizer is controlled by the gate current, a small gate current producing a large hysteresis and a large gate current producing a small hysteresis;
• and wherein the quantizer generates up-count and down-count voltage pulses for increasing and decreasing values of the analog signal, a small hysteresis allowing the quantizer to output the up-count and down-count pulses to the binary counter and a large hysteresis inhibiting the generation of voltage pulses, thus providing a read period for the counter.