Clock skew measurement technique
AssigneeAmdahl Corporation
InventorJohn F. Merrill
Life of this patent
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AssigneeAmdahl Corporation
InventorJohn F. Merrill
Estimating the term…
Method and apparatus are disclosed for measuring the clock offset between a reference latch point and a subject latch point in a system. In the system, an associated latch point is provided on each chip which has a subject latch point, the clock offset to which is to be measured. Test data distribution means is provided for distributing a test data signal from a test data source point to the data input of the reference latch point and to the data input of the associated latch point. Cross-transmission means are also provided for connecting together the data input of the reference latch point and the data input of the associated latch point. A pulse burst generator is connected to the clock source point in the system and a test data signal generator is connected to the test data signal source point. The test data signal generator responds to each burst of clock pulses by generating a logic level transition on the test data source point at a presettable time following a known one of the edges of the clock pulses in each burst. By adjusting the presettable delay in the test data signal generator, and observing the output of a given latch point after the last clock pulse in each burst reaches the clock input of the given latch point, a delay setting is determined at which the path delay for the following two paths are approximately equivalent: (1) the path from the clock source point through the clock distribution means to the clock input of the given latch point; and (2) the path from the clock source point through the test data signal generator, through the test data distribution means and to the data input of the given latch point.
A system including a plurality of latch points, said plurality of latch points including a first reference latch point and a first subject latch point, each latch point in said plurality having a clock input, a data input and a data output, each latch point in said plurality supplying to its data output in response to a given clock pulse received at the clock input of said latch point a value responsive to that data present at the data input of said latch point when an effective edge of said given clock pulse reaches the clock input of said latch point, said system further including a clock source point and clock distribution means for transmitting a clock signal from said clock source point to the clock input of each of said plurality of latch points, said system further including apparatus for measuring clock skew between said first reference latch point and said first subject latch point, said apparatus comprising:
A method for measuring the clock offset of a first subject latch point relative to a reference latch point, comprising the steps of:
Dependencies are inferred from the claim text.