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US 4,999,628 AGranted
Analog-to-digital converting unit with broad dynamic range
AssigneeYamaha Corporation
InventorsYuji Kakubo, Hiromi Sotome
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AssigneeYamaha Corporation
InventorsYuji Kakubo, Hiromi Sotome
Estimating the term…
An analog-to-digital converting unit comprises an analog level varying circuit having a plurality of gains and varying a magnitude of an analog input signal for producing a plurality of analog output signals different in magnitude from one another with the respective gains, a plurality of analog-to-digital converting circuits respectively supplied with the analog output signals and producing a plurality of digital code signals, respectively, a controlling circuit supplied with two of the digital code signals and calculating a difference therebetween for producing a first control signal indicative of varying one of the digital code signals in value so as to be equal in value to the other digital code signal, a calculating circuit responsive to the first control signal and causing one of the digital code signals to be varied in value for producing a candidate of a digital output signal, and an output circuit coupled to one of the analog-to-digital converting circuits and to the calculating circuit and supplying the digital output signal to the output node. Since the value of the input analog signal is retrieved from the digital code signal on the basis of the difference, the analog-to-digital unit is free from any secular changes and any variation of operational ambient.
An analog-to-digital converting unit comprising
An analog-to-digital converting unit as set forth in claim 10, in which said calculating means comprises a multiplier circuit multiplying the value of said one of said digital code signals by the value of said first control signal for producing a digital product signal serving as said candidate.
An analog-to-digital converting unit as set forth in claim 11, in which said output means comprise an overflow detecting circuit checking said first absolute digital code signal to see whether or not an overflow of bit takes place, said overflow detecting circuit producing first and second coefficients with respective values of one and zero upon detecting the overflow, said overflow detecting circuit producing said first and second coefficients with respective values of zero and one if no overflow takes place, said output means further comprising a first output multiplier circuit multiplying the value of said digital product signal by the value of said second coefficient for producing a first output product signal, a second output multiplier circuit multiplying the value of the other digital code signal by the value of said first coefficient for producing a second output product signal, and an adder for producing said digital output signal through an adding operation between said first and second output product signals.
An analog-to-digital converting unit comprising
Dependencies are inferred from the claim text.