Operational amplifier circuit
AssigneeU.S. Philips Corporation
InventorJohn B. Hughes
Life of this patent
Estimating the term…
Abstract
An operational amplifier circuit comprises a differential input stage (22) and an output transistor (N3) driven by an output (24) of the differential input stage. Means (N4, P3, P5) for generating a bias current for the differential input stage are constructed so that in operation the bias current is in a predetermined proportion to the current flowing in the output transistor (N3) and is substantially independent of the impedance (Z) of any load driven by the output transistor, thereby eliminating a systematic offset error. The means for generating the bias current may include a further transistor (N4) driven by the output of the differential input stage.
Claims23
An operational amplifier circuit comprising:
- matched transistors connected in a differential pair arrangement having a common terminal, first and second control terminals forming inputs of the amplifier and first and second output terminals;
- a bias current source having an output connected to the common terminal of the differential pair arrangement;
- a current mirror active load circuit having an input transistor and an output transistor connected to receive current from the first and second output terminals of the differential pair arrangement respectively;
- and
- at least one output transistor having a control electrode connected to the second output terminal of the differential pair arrangement, said output transistor being connected to supply an output current of the amplifier to a load;
- wherein the bias current source comprises means for supplying a bias current of predetermined proportion relative to the current flowing in the at least one output transistor so as to maintain equal voltages at said first and second output terminals for equal voltages applied to the first and second control terminals thereby to minimize a systematic offset voltage between the first and second output terminals of the differential pair arrangement when said output current forms all or a substantial part of the current flowing in the at least one output transistor.
A bandgap reference circuit comprising;
- an operational amplifier circuit comprising:
- first and second matched transistors connected in a differential pair arrangement having a common terminal, first and second control terminals forming inputs of the amplifier and first and second output terminals;
- a bias current source having an output connected to the common terminal of the differential pair arrangement;
- a current mirror active load circuit having an input transistor and an output transistor connected to receive current from the first and second output terminals of the differential pair arrangement respectively;
- and
- two matched or similar output transistors having control electrodes connected to the second output terminal of the differential pair arrangement,
- said bandgap reference circuit further comprising two semiconductor junction devices of different dimensions coupled to said two output transistors which transistors control currents flowing through the two semiconductor junction devices;
- and wherein the bias current source comprises means for supplying a bias current of predetermined proportion relative to the currents flowing in the two output transistors so as to minimize a systematic offset voltage between the first and second output terminals of the differential pair arrangement when said controlled currents form all or a substantial part of the currents flowing in the two output transistors.
An operational amplifier circuit comprising;
- first and second matched transistors connected as a differential pair arrangement having a common terminal, first and second control terminals and first and second output terminals,
- a source of bias current having an output connected to the common terminal of the differential pair arrangement,
- a current mirror active load circuit having an input transistor and an output transistor connected to receive current from the first and second output terminals of the differential pair arrangement, respectively,
- first and second signal input terminals coupled to said first and second control terminals, respectively, and isolated from said second output terminal so that there is no feedback between said second output terminal and said first and second control terminals, and
- an output transistor having a control electrode connected to the second output terminal of the differential pair arrangement, said output transistor being connected to supply an output current of the amplifier to a load,
- wherein the bias current source comprises means for supplying a bias current of predetermined proportion relative to the current flowing in the output transistor such that a voltage at said first output terminal is made equal to a voltage at said second output terminal of the differential pair arrangement whereby said output current of the amplifier is substantially independent of the load impedance.
Dependencies are inferred from the claim text.