Signal distinction circuit
AssigneeSanyo Electric Co., Ltd.
InventorMasaya Tanno
Life of this patent
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Abstract
A signal distinction circuit comprising a noise detector for detecting a noise included in a received signal; and a maintaining circuit for maintaining the condition of a signal outputted from a detector for detecting a discrimination signal according to a signal outputted from the noise detector so that since the noise detector and the maintaining circuit prevent the condition of a signal outputted from the distinction circuit from being changed when an inteference such as a multipath interference occuurs, an output corresponding to a received signal can be reliably obtained.
Claims5
A signal distinction circuit having a pulse generator for generating a pulse in correspondence with the frequency of a discrimination signal;
- a counter for counting the number of pulses of a clock signal according to a signal outputted from said pulse generator;
- a detector for detecting said discrimination signal based on a value counted by said counter;
- comprising:
- a level detector for detecting the level of said discrimination signal, thus generating a reset signal for resetting said detector;
- and
- a gate circuit for interrupting said reset signal according to the condition of a signal outputted from said detector.
A signal distinction circuit having a pulse generator for generating a pulse according to a discrimination signal included in a received signal;
- a counter for counting the number of pulses of a clock signal according to a pulse outputted from said pulse generator;
- a detector for detecting said discrimination signal according to a value counted by said counter, comprising:
- a noise detector for detecting a noise included in a received signal;
- and
- a maintaining circuit for maintaining the condition of a signal outputted from said detector according to a signal outputted from said noise detector.
Dependencies are inferred from the claim text.