Multiprocessing system having nodes containing a processor and an associated memory module with dynamically allocated local/global storage in the memory modules
AssigneeInternational Business Machines Corporation
InventorsWilliam C. Brantley, Jr., Kevin P. McAuliffe, Vern A. Norton, Gregory F. Pfister, Joseph Weiss
Life of this patent
Estimating the term…
Abstract
A multiprocessing system is presented having a plurality of processing nodes interconnected together by a communication network, each processing node including a processor, responsive to user software running on the system, and an associated memory module, and capable under user control of dynamically partitioning each memory module into a global storage efficiently accessible by a number of processors connected to the network, and local storage efficiently accessible by its associated processor.
Claims14
In a multiprocessing system having a plurality of processing nodes interconnected together by a communication network, each processing node including a processor responsive to user software running on the system, and a memory module, the methods comprising the steps of:
- mapping virtual addresses of storage reference requests produced by said processors to real addresses, each of the real addresses having high-order bits for identifying one of said memory modules in one of said processing nodes and low-order bits for identifying a storage location in the identified memory module;
- selectively swapping a variable number of said high-order bits for the same number of said low-order bits of said real addresses to generate corresponding absolute addresses;
- controlling said selective swapping under the dynamic control of said processors during run time by providing swapping information which specifies the number of said high-order bits and low-order bits to be swapped;
- and
- directing said storage reference requests from each processor in accordance with said absolute addresses to either said memory module in its respective processing node or to other memory modules in remote processing nodes via said communication network.
In a multiprocessing system having a plurality of processing nodes interconnected together by a communication network, each processing node including a processor and a memory module, the improvement comprising:
- mapping means for mapping virtual addresses of storage reference requests produced by said processors to real addresses, each of the real addresses having high-order bits for identifying one of said memory modules in one of said processing nodes and low-order bits for identifying a storage location in the identified memory module;
- swapping means for selectively swapping a variable number of said high-order bits for the same number of said low-order bits of said real addresses to generate corresponding absolute addresses;
- control means under the dynamic control of said processors for controlling said swapping means by providing thereto swapping information which specifies the number of said high-order bits and low-order bits to be swapped;
- and
- means, coupled to said swapping means, for directing said storage reference requests from each processor in accordance with said absolute addresses to either said memory module in its respective processing node or to other memory modules in remote processing nodes via said communication network.
Dependencies are inferred from the claim text.