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US 4,980,653 AGranted
Phase locked loop
AssigneeMotorola, Inc.
InventorWayne P. Shepherd
Life of this patent
Estimating the term…
Abstract
A phase locked loop (100) with a sample and hold phase detector (106) with adjustable gain. A switching circuit adjusts the slew rate of the phase detector by either introducing additional ramp capacitance (122) in the phase detector or by increasing the current for charging the ramp capacitor (116).
Claims6
A phase locked loop comprising:
- controlled oscillator means for providing an output signal, having a variable frequency responsive to a control signal;
- reference means for providing first and second reference signals;
- divider means for dividing the output signal by a predetermined divisor, to provide a divided signal;
- sample and hold phase detector means, having adjustable gain and slew rate, for comparing the phase of alternatively, the first and second reference signals with the phase of the divided signal;
- and:
- means for selectively adjusting the slew rate of the sample and hold phase detector means to optimize the adjustable gain of the phase detector means with respect to, alternatively, the first and second reference signals.
3 more elements
Dependencies are inferred from the claim text.