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US 4,978,957 AGranted
High-speed analog-to-digital converter
AssigneeHitachi, Ltd.
InventorsMasao Hotta, Toshihiko Shimizu, Yoshito Nejime
Life of this patent
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Abstract
Disclosed is a parallel analog-to-digital converter in which a plurality of comparators are divided into a plurality of groups each consisting of a predetermined number of comparators, and outputs of at least these comparators belonging to the same group are added in an analog or digital fashion. Whether or not the result of addition of the outputs of the comparators exceeds a predetermined threshold level is decided in an analog or digital fashion so as to determine high-order and low-order bits of a digital output signal of the converter on the basis of the result of decision.
Claims19
An analog-to-digital converter comprising:
- means including a plurality of series-connected resistors for providing a plurality of reference signals corresponding to a desired resolution;
- a plurality of parallel-connected comparators for comparing an analog input signal with said reference signals;
- adder means for adding outputs of said comparators belonging to each of groups obtained by dividing said plural comparators into groups each consisting of a predetermined number of said comparators;
- level discrimination means for deciding whether or not the output level of each of said adder means exceeds a predetermined threshold level;
- high-order code conversion means for determining high-order bits on the basis of the values of the outputs of said level discrimination means;
- and
- low-order code conversion means for determining low-order bits on the basis of the values of the outputs of said level discrimination means.
4 more elements
An analog-digital converter comprising:
- means including a plurality of series-connected resistors for providing a plurality of reference signals corresponding to a desired resolution;
- a plurality of parallel-connected comparators for comparing an analog input signal with said reference signals;
- adder means for adding outputs of said comparators belonging to each of groups obtained by dividing said plural comparators into groups each consisting of 2.sup.M comparators (M=2,3).
- level discrimination means for deciding whether the output level of each of said adder means is 2.sup.M times or less than 2.sup.M times as high as the output level of a single comparator;
- change point detection means for detecting a change point between the outputs of adjacent ones of said level discrimination means;
- switch means turned on in response to the application of the output of said change point detection means;
- high-order code conversion means using the output of said change point detection means to determine a digital code representing high-order bits;
- and
- low-order code conversion means using, when said switch means is turned on in response to the application of the output of said change point detection means, the output of said adder means associated with said switch means to determine a digital code representing low-order bits.
6 more elements
An analog-to-digital converter comprising:
- means including a plurality of series-connected resistors for providing a plurality of reference signals corresponding to a desired resolution;
- a plurality of parallel-connected comparators for comparing an analog input signal with said reference signals;
- adder means for adding outputs of said comparators belonging to each of groups obtained by dividing said plural comparators into groups each consisting of 2.sup.M comparators (M=2,3) and also adding outputs of some of said comparators belonging to the next adjacent high-order group;
- level discrimination means for deciding whether the output level of each of said adder means is 2.sup.M times or less than 2.sup.M times as high as the output level of a single comparator;
- change point detection means for detecting a change point between the outputs of adjacent ones of said level discrimination means;
- switch means turned on in response to the application of the output of said change point detection means;
- high-order code conversion means using the output of said change point detection means to determine a digital code representing high-order bits;
- and
- low-order code conversion means using, when said switch means is turned on in response to the application of the output of said change point detection means, the output of said adder means associated with said switch means to determine a digital code representing low-order bits.
6 more elements
Dependencies are inferred from the claim text.