Resolver excitation circuit
AssigneeAllen-Bradley Company, Inc.
InventorDavid J. Morris
Life of this patent
Estimating the term…
Abstract
A resolver driver circuit uses sine and cosine values stored in a read only memory to generate sine and cosine waveforms by sequentially reading the stored values and passing them through a clocked data latch to a digital-to-analog converter. The output of the digital-to-analog converter is filtered to remove quantization error. Phase error produced by the filtering and other sources is detected by timing the zero crossings of the sine and cosine waveforms and comparing them to a master synchronization signal. Phase error is corrected by controlling the timing of the latch which passes data to the digital-to-analog converter.
Claims5
A resolver excitation circuit for correcting phase difference between a digital timing reference signal and a sinusoidal excitation signal, the resolver excitation circuit comprising:
- memory means for storing words of waveform data as a sequence of digitized waveform values for the sinusoidal excitation signal;
- first latch means for sequentially receiving words of waveform data from the memory means, the first latch means storing one word of waveform data at one time;
- means for generating a plurality of addresses to the memory means to cause output of a plurality of the words of waveform data to the first latch means over a portion of one cycle of the sinusoidal excitation signal;
- digital-to-analog converter means responsive to waveform data received from the first latch means for converting the waveform data to an analog signal that controls sinusoidal excitation signal;
- means for generating a digital timing reference signal;
- phase difference detection means for detecting a phase difference between the sinusoidal excitation signals and the digital timing reference signal;
- and
- phase correction means for controlling the time of output of each word of waveform data from the first latch means to the digital-to-analog converter means in response to the detection of a phase difference by the phase detection means to correct the phase of the sinusoidal excitation signal.
A resolver excitation circuit for correcting phase differences between two sinusoidal excitation signals that differ in phase by approximately ninety degrees, the resolver excitation circuit comprising:
- memory means for storing waveform words as a sequence of digitized waveform values for the sinusoidal excitation signals;
- demultiplexer means for sequentially receiving and storing a word pair from the memory, each word of the pair associated with digitized waveform value for one of the sinusoidal excitation signals at a corresponding phase;
- first latch means for independently receiving each word of one word pair from the demultiplexer means,
- means for generating a plurality of addresses to the memory to cause output of a plurality of the word pairs of waveform data to the demultiplexer means over a portion of corresponding cycles of each the sinusoidal excitation signals;
- digital-to-analog converter means independently responsive to each word of the word pair received from the first latch means for converting the word pairs into two analog signals that control the sinusoidal excitation signals associated with each word;
- means for generating a digital timing reference signal;
- phase difference detection means for detecting a phase difference between each of the sinusoidal excitation signals and the digital timing reference signal;
- and
- phase correction means for independently controlling the time of output of each word of the word pair from the first latch means to the digital-to-analog converter means in response to the detection of a phase difference by the phase detection means to correct the phase of the sinusoidal excitation signals.
Dependencies are inferred from the claim text.