Sequence controller
AssigneeHitachi, Ltd.
InventorsNaohiro Kurokawa, Ryoichi Abe, Tatsuo Fujiwara
Life of this patent
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Abstract
In processing a sequence program for a normally closed contact, the input signal is logically inverted before processing, inversion not being required for a normally open contact. A logical inversion circuit is provided for logically inverting an input signal corresponding to the normally closed contact designation of the sequence program before the input signal is fed to a central processing unit, so that inversion processing in the central processing unit can be dispensed with and the operation speed can be increased. The application of a logical inversion signal to the logical inversion circuit can readily be effected by utilizing an address line of the central processing unit.
Claims8
A sequence controller comprising:
- input means connectable to a plurality of input devices for receiving input signals from said input devices, output means connectable to at least one output device for providing an output signal to said output device;
- memory means for storing programmed sequence data including instruction words in the form of machine codes and associated input numbers forming addresses of respective input devices and containing logical inversion instructions adapted to selectively invert input signals from input devices addressed by said input numbers;
- a central processing unit connected to said memory means and said input means and said output means for performing logical operations on input signals received from an input device via said input means on the basis of the programmed sequence data stored in said memory means and for delivering the results of the logical operation to said output means, including a plurality of address lines for carrying said input numbers;
- means including a logical inversion circuit connected between said input means and said central processing unit and responsive to a signal on a predetermined address line of said central processing unit for logically inverting selected input signals from said input means prior to application of said selected input signals to said central processing unit;
- said central processing unit further including means for successively reading from said memory means an instruction word and an associated input number, and means for directly executing said instruction word and for applying said input number to said address lines, thereby to deliver address signals to said input means for selecting an input signal of an addressed input device and to deliver said logical inversion instruction in the input number to said logical inversion circuit through said predetermined address line, said logical inversion circuit logically inverting the addressed input signal or not depending on said logical inversion instruction.
Dependencies are inferred from the claim text.