Evaluation method for semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsYoshiro Baba, Yutaka Koshino, Seiji Yasuda
Life of this patent
Estimating the term…
Loading patent…
AssigneeKabushiki Kaisha Toshiba
InventorsYoshiro Baba, Yutaka Koshino, Seiji Yasuda
Estimating the term…
An evaluation method for a semiconductor device includes the steps of applying a reverse bias voltage between an N-type substrate formed in a surface of the semiconductor device and a P-type region formed in a surface of the N-type substrate to form a depletion layer along the junction therebetween, scanning the surface of the semiconductor device is one direction with a light beam to cause an optical beam induced current to be flow across the junction, and measuring the OBIC intensity profile on a scanning line extending across the depletion layer in the surfaces of the N-type substrate and P-type region. In the method, the light beam has a wavelength whose penetration length is smaller than the depth or thickness of the P-type region, the OBIC intensity profile is integrated over a range corresponding to the depletion layer, and the integrated value is normalized by the reverse bias voltage to determine the surface potential distribution of the semiconductor device.
An evaluation method for determining a surface potential distribution of a semiconductor device having a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region formed at a surface of the semiconductor device and the second semiconductor region formed at a surface of the first semiconductor region contiguous said surface of the semiconductor device and surrounded by the first semiconductor region, the first and second semiconductor regions forming a junction, comprising the steps of:
Dependencies are inferred from the claim text.