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AssigneeThe United States of America as represented of the United States Department of Energy
InventorsMark W. Wanlass, Peter Sheldon
Estimating the term…
A substrate structure for an InP-based semiconductor device having an InP based film is disclosed. The substrate structure includes a substrate region having a lightweight bulk substrate and an upper GaAs layer. An interconnecting region is disposed between the substrate region and the InP-based device. The interconnecting region includes a compositionally graded intermediate layer substantially lattice-matched at one end to the GaAs layer and substantially lattice-matched at the opposite end to the InP-based film. The interconnecting region further includes a dislocation mechanism disposed between the GaAs layer and the InP-based film in cooperation with the graded intermediate layer, the buffer mechanism blocking and inhibiting propagation of threading dislocations between the substrate region, and the InP-based device.
A substrate structure for an InP based semiconductor device having an InP based film comprising:
In an InP-based semiconductor device having an InP p/n junction layer supported by a base substrate support structure, the improvement comprising an interconnecting region disposed between said InP layer and said substrate support structure, said interconnecting region including a compositionally graded intermediate layer that is substantially lattice-matched at its upper end to said InP layer and is further substantially lattice-matched at its lower end to said substrate support structure, said interconnecting region further including first and second buffer means disposed between said intermediate layer and, respectively, said substrate support structure and said InP layer to inhibit the propagation of dislocations, and wherein said improvement further comprises a GaAs layer incorporated as part of said substrate support structure in the upper portion thereof adjacent said first buffer means.
Dependencies are inferred from the claim text.