Low voltage non-saturating logic circuit technology

An integrated circuit having at least a portion thereof provided with digital logic circuitry which comprises:

• first and second electrically conductive power networks;
• an array of transistors connected to in parallel controllably conduct current between the first and second electrically conductive power networks;
• means for regulating current flow through the first and second electrically conductive power networks to an approximately constant total current flow;
• said array of transistors being logically connected so as to provide current balanced groups which conduct current balanced current flows between the first and second electrically conductive power networks;
• said transistors being electrically connected at a bias control connection thereof to a load means to form logical inputs;
• said load means also being electrically connected to the first power network;
• another terminal of the transistors being electrically connected to the second electrically conductive power network;
• and a further terminal of the transistors being electrically connected to from logical outputs;
• the transistors being connected to controllably conduct current between the first and second electrically conductive power networks dependent upon biasing voltages applied at said bias control connection;
• means for providing biasing to the transistors which causes approximately equal amounts of current flow between the electrically conductive power networks for transistors which are on, and which causes relatively small amounts of current to flow between the electrically conductive power networks for transistors which are off.

An integrated circuit having at least a portion thereof provided with digital logic circuitry which includes a plurality of logic transistor means which are connected to controllably conduct current between first and second electrically conductive power networks;

• said plurality of logic transistor means being logically connected to conduct a carefully controlled total amount of current over time for a variety of logical input and output combinations;
• means for providing high and low biasing voltages to the logic transistors to turn the transistors on and off, respectively;
• said means for providing high and low biasing voltages to the logic transistors being constructed so as to provide high biasing voltages which are sufficiently defined to cause substantially equivalent current flow through transistors which are on;
• said means for providing high and low biasing voltages being further constructed to provide low biasing voltages which provide for current flow which is greatly reduced compared to the on transistors;
• and means for regulating total current flow through the first electrically conductive power network, second electrically conductive power network and plurality of logic transistor means to provide approximately constant current flow therethrough.