Process for making a self aligned vertical field effect transistor having an improved source contact
AssigneeMotorola, Inc.
InventorRobert B. Davies
Life of this patent
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Abstract
An improved method for making a self-aligned vertical field effect transistor is provided wherein a nitride sidewall spacer is formed around a polysilicon gate, and an oxide sidewall spacer, which may be heavily doped with an n-type dopant, is formed covering the silicon nitride sidewall spacer. The silicon nitride sidewall spacer allows the oxide sidewall spacer of a conventional self-aligned vertical field effect transistor process to be removed partially or completely before making ohmic contact to the source thus increasing the contact area between the source and the source electrode and eliminating reliability problems related to n-type doped oxide in contact with aluminum electrodes.
Claims7
An improved method for making a vertical field effect transistor having a silicon substrate which serves as a drain, a polysilicon gate formed on one surface of the silicon substrate, and a source formed in the silicon substrate, the improvement comprising the steps of:
- forming a silicon nitride sidewall spacer covering an edge of the gate;
- forming an oxide sidewall spacer covering the silicon nitride sidewall spacer;
- etching a portion of the source using the oxide sidewall spacer as an etch mask thereby producing an exposed portion of the silicon substrate;
- and removing the oxide sidewall spacer.
Dependencies are inferred from the claim text.