US 4,958,360 AGranted

Circuit for recovering the carrier in digital transmission systems

AssigneeU.S. Philips Corporation

InventorHikmet Sari

Life of this patent

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Abstract

A circuit for recovering the carrier of a digitally modulated wave comprising a voltage-controlled oscillator (17) that is controlled by an error signal .epsilon.(.phi.) in order to adjust the phase of the oscillator, the modulated wave being introduced into two channels, the one in phase (10) and the other in quadrature (20) with the carrier, the two channels being joined together by a phase comparator arrangement (25) which produces the error signal and a sampling clock (H1). The phase comparator arrangement (25) alternately operates as a phase detector and as a frequency detector and therefore comprises an apparatus for selecting received signal points with the aid of selection zones formed by ring segments, situated around certain states of the signal constellation. The signals of the in-phase and quadrature channels are used to address a memory (26) that contains the information belonging to or not belonging to the signal point received in one of the selected zones as well as the amplitude and the error sign that relate thereto. In addition, the phase comparator arrangement (25) comprises apparaturs (28, 29) for generating the sampling clock (H1) which, in the acquisition mode (off-hook), validates the basic clock H only for these selected zones and, in the permanent mode (on-hook), validates all the edges of the clock H for forming the sampling clock.

Claims20

Dependent claims

A circuit for recovering a carrier from a digitally modulated wave having a phase symmetry 2.pi./M, where M is an integer representing a symmetry order of a modulation scheme of said digitally modulated signal, said modulation scheme corresponding to a signal constellation having states, which states are representable using a graphic representation in polar coordinates by a function F(A,.PHI.), where A and .PHI. represent modulus and phase, respectively, of the states in the signal constellation, the circuit comprising:

(a) a voltage-controlled oscillator having an output for supplying an output signal which represents said carrier and a control input for receiving an error signal .epsilon.(.phi.) for changing a phase of the oscillator to adjust it to a phase of said digitally modulated wave, the phase .phi. being the phase difference between signal points of received digitally modulated wave and corresponding states, idealized ones of said signal points being states of said signal constellation;
(b) a first channel for in-phase demodulation;
(c) a second channel for quadrature-phase demodulation;
(d) phase comparing means, coupled to outputs of the first and second channels and to receive a basic recovered clock signal H, for determining and validating a comparator signal, the phase comparing means alternatively operating as phase detector and as a frequency detector and comprising means for selecting received signal points using selection zones, said selection zones being defined with respect to said graphic representation as located around certain states of the signal constellation, said selection zones appearing in said graphic representation as ring segments;
(e) means for producing a variable rate sampling clock signal which reproduces the basic clock signal H by discarding certain edges, said producing means:
(i) when the circuit is in acquisition mode (unlocked), validating the basic clock signal H only for the selection zone;
and
(ii) when the circuit is in permanent mode (locked), validating all edges of the clock signal H for forming the sampling clock signal;
said sampling clock signal being supplied to the comparing means to control validating of the comparator signal;
and
(f) means for converting the comparator signal to the error signal .epsilon.(.phi.).

8 more elements

Apparatus for use in a circuit for recovering a carrier from a digitally modulated wave having a phase symmetry 2.pi./M, where M is an integer representing a symmetry order of a modulation scheme of said digitally modulated signal, said modulation scheme corresponding to a signal constellation having states, which states are representable using a graphic representation in polar coordinates by a function F(A,.PHI.), where A and .PHI. represent modulus and phase, respectively, of the states in the signal constellation, the apparatus comprising:

(a) phase comparing means, coupled to outputs of a first, in-phase demodulation channel and of a second, quadrature-phase demodulation channel and coupled to receive a basic recovered clock signal H, for determining and validating a comparator signal, the phase comparing means alternatively operating as phase detector and as a frequency detector and comprising means for selecting received signal points using selection zones, said selection zones being defined with respect to said graphic representation as located around certain states of the signal constellation, said selection zones appearing in said graphic representation as ring segments, the comparator signal being for supplying to control a voltage-controlled oscillator which in turn controls demodulation in the first and second channels, and
(b) means for producing a variable rate sampling clock signal which reproduces the basic clock signal H by discarding certain edges, said producing means:
(i) when the circuit is in acquisition mode (unlocked), validating the basic clock signal H only for the selection zones;
and
(ii) when the circuit is in permanent mode (locked), validating all edges of the clock signal H for forming the sampling clock signal;
said sampling clock signal being supplied to the comparing means to control validating of the comparator signal.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 07/420,681Filed 11 Oct 1989 · continuation
Priority: FR 87 1329225 Sep 1987
Granted: 18 Sep 1990
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H03L 7/087
Concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal: using at least two…
H04L 27/2273
Wherein the carrier recovery circuit uses only the demodulated signals: associated with quadrature demodulation, e.g. Costas loop
H04L 2027/0067
Elements of loops: phase error detectors
H04L 2027/0075
Control of loops: error weighting