Sample-and-hold digital phase-locked loop for ask signals

Apparatus for generating a clock signal that is phase-locked with an amplitude modulated (AM) carrier signal, and apparatus comprising:

• means for generating a lock clock signal that has a frequency approximately equal to the frequency of said carrier signal, the frequency of said local clock signal being adjustable as controlled by a control signal;
• phase detector means for detecting the phase error between said carrier signal and said local clock signal;
• means for determining an average amplitude of said AM carrier signal and comparing said average amplitude to a prescribed value;
• sampling means for sampling the phase error detected by said phase detector means at least once during each period of said carrier signal only when the average amplitude of said AM carrier signal exceeds said prescribed value, whereby the phase error is not sampled when the average amplitude of said AM carrier signal is less than said prescribed value;
• integrating means for integrating the most recent sampled phase error obtained from said sampling means and for holding the resulting integrated sampled phase error until said sampling means again samples the phase error between said input signal and said clock signal, and output signal of said integrating means thereby comprising the integral of the most recent sampled phase error presented to the input of said integrating means;
• and
• means responsive to said output signal of said integrating means for generating said control signal, said control signal being applied to said local clock signal generation means to adjust the frequency thereof in a direction that minimizes the phase error between said local clock signal and said AM carrier signal.

A sample-and-hold digital phase-locked circuit for providing a local clock signal that is phase-locked to a carrier signal included within an amplitude shift keying (ASK) input signal, comprising:

• binary controlled digital oscillator means for generating said local clock signal;
• pulse generator means for generating a binary signal that controls said binary controlled digital oscillator as a function of a first input signal;
• phase detector means for measuring the phase error between said local clock signal and said input ASK signal;
• threshold means for determining an average amplitude of the carrier signal within said ASK input signal and comparing said average amplitude to a prescribed threshold;
• sampling means for sampling the phase error measured by said phase detector means at least once during each cycle of said local clock signal when the average amplitude of said carrier signal exceeds said prescribed threshold;
• and
• integrator means for integrating said sampled phase error from said sampling means, said integrated sampled phase error obtained from said integrator means comprising said first input signal applied to said pulse generator, said first input signal being applied to said pulse generator until said sampling means provides a new sample of the phase error to said integrator means.

A method for extracting a clock signal that is phase-locked with an input signal modulated by amplitude shift keying (ASK) comprising the steps of:

• (a) generating a local clock signal having a frequency that varies as a function of a control signal;
• (b) detecting the phase difference between the ASK input signal and the local clock signal;
• (c) generating an error signal as a function of the phase difference detected in step (b);
• (d) comparing the amplitude of the ASK input signal with a prescribed threshold value;
• (e) sampling said error signal only when the amplitude of the ASK input signal exceeds said prescribed threshold value;
• (f) integrating said sampled error signal;
• (g) generating said control signal as a function of the integrated sampled error signal as a step (f) and maintaining the value of said control signal at a substantially constant value until the error signal is again sampled;
• and (h) adjusting the frequency of said local clock signal as a function of the value of said control signal.