Delay circuit for semiconductor integrated circuit devices

A delay circuit comprising:

• (a) charging/discharging circuit means for receiving an input signal and for producing an output voltage in response to said input signal;
• (b) voltage divider means for receiving a source voltage and dividing said source voltage to provide a reference voltage having a constant potential level, said voltage divider means having first and second resistors coupled in series with each other;
• (c) comparator means, having an inverting input coupled through a first signal line to said charging/discharging circuit means and a non-inverting input coupled through a second signal line to said voltage divider means, for comparing said output voltage of said charging/discharging circuit means with said reference voltage;
• (d) switch circuit means, provided between said first and second resistors in said voltage divider means, for receiving said input signal and being rendered selectively nonconductive in response to said input signal to electrically disconnect said first and second resistors from each other and disconnect said second signal line from said first and second resistors, thereby rendering said second signal line electrically floating;
• and
• (e) voltage keeping means, coupled to said second signal line, for receiving said reference voltage to be charged when said switch circuit means is rendered conductive, and for maintaining said reference voltage on said second signal line when said switch circuit means is rendered non conductive..

A delay circuit for a semiconductor integrated circuit device, comprising:

• charging/discharging means for receiving an input signal and for producing a variable output signal in response to the input signal;
• voltage-divider means for receiving a first voltage and for producing a reference voltage having a constant potential level;
• comparator means having a first input (-) connected to said charging/discharging means and a second input (+) connected to said voltage-divider means, for comparing the output voltage of said charging/discharging means with the reference voltage;
• said charging/discharging means including a first capacitor connected to a second voltage and said first input;
• switching means for electrically separating said second input of said comparator means from said voltage-divider means in response to said input signal;
• and
• a second capacitor connected to said second voltage and said second input of said comparator means.

A delay circuit comprising:

• a charging/discharging circuit connected between a first power supply voltage and a second power supply voltage, said charging/discharging circuit comprising a first capacitor;
• a reference voltage generation circuit connected between the first and second voltages, for generating a constant voltage;
• a comparator having an inverting input connected to said charging/discharging circuit and a non-inverting input connected to said reference voltage generation circuit;
• switching means for selectively disconnecting said comparator from said reference voltage generating circuit;
• a second capacitor connected to said non-inverting input of said comparator;
• and
• said first and second capacitors being connected to one of said first and second voltages.