Digital waveform measuring apparatus having a shading-tone display function
AssigneeAnritsu Corporation
InventorsAiichi Katayama, Kenichi Kon
Life of this patent
Estimating the term…
Abstract
A timing signal generating circuit generates a timing signal for each sweep timing period. An address generating circuit generates an address corresponding to each sweep timing period and to the magnitude of the input signal, each time it receives the timing signal. An image memory stores data in the address generated by the address generating circuit. A computing unit performs, upon each receipt of the timing signal, a predetermined computation on that data stored in the image memory and generates a result of computation. The computation result represents the frequency of the same address generated for each sweep timing period. A display unit displays the input signal with a luminance level corresponding to the computation result.
Claims29
A digital waveform measuring apparatus comprising;
- address generating means for generating an address corresponding to a magnitude of an input signal for each of a number of sweep timing dots;
- frame buffer memory means for storing data corresponding to each timing dot and to the address generated by the address generating means, the data representing the existence of a waveform to be observed;
- weight computing means for, upon the occurrence of a coincidence between an address generated by the address generating means with a given sweep timing dot and an address generated by the address generating means with the next sweep timing dot, weighting the data stored in the address which is generated with the given sweep timing dot and for outputting the weighted data to the frame buffer memory;
- said weight computing means further including means for outputting color data corresponding to the number of occurrences of the same address generated for each sweep timing dot;
- and
- display means for receiving the weighted data from the frame buffer memory and for displaying it as a waveform.
A digital waveform measuring apparatus comprising:
- timing signal generating means for generating a timing signal for each of a number of sweep timing dots;
- address generating means for receiving an input signal and the timing signal generated by the timing signal generating means, and for generating an address corresponding to each sweep timing dot and to the magnitude of the input signal, upon each receipt of the timing signal generated by the timing signal generating means;
- memory means for storing data in the address generated by the address generating means;
- computing means for performing a predetermined computation on the data in the memory means each time it receives the timing signal from the timing signal generating means and for outputting a computation result to the memory means, the computation result representing the frequency of the same address generated for each sweep timing dot;
- and
- display means for receiving the computation result from the memory means and for displaying the input signal with a luminance level corresponding to the computation result output by the computing means.
A digital waveform measuring apparatus comprising:
- converting means for receiving and frequency-converting an input signal;
- detecting means for frequency-discriminating the input signal frequency-converted by the converting means and for outputting a detection signal;
- timing signal generating means for generating a timing signal for each of a number of sweep timing dots;
- address generating means for receiving the timing signal generated by the timing signal generating means and the detection signal detected by said detecting means and for generating an address corresponding to each sweep timing dot and to the magnitude of said detection signal, upon each receipt of said timing signal generated by said timing signal generating means;
- memory means for storing data in the address generated by the address generating means;
- computing means for performing a predetermined computation on the data stored in said memory means, each time it receives said timing signal from said timing signal generating means, and for outputting a computation result to the memory means, the computation result representing the frequency of the same address generated for each sweep timing dot;
- and
- display means for receiving the computation result from the memory means and for displaying said input signal with a luminance level corresponding to said computation result output by the computing means, computation coming from said computing means.
Dependencies are inferred from the claim text.