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AssigneeSchlumberger Technologies, Inc.
InventorsA. K. Jeffrey, David J. Marsh, Philip I. Collins
Estimating the term…
A multichannel automatic test system for an electronic circuit utilizes a "true tester-per-pin" architecture; each channel of the tester operates as if it were an independent tester. Each channel of the tester has a memory circuit which stores instructions for operating that channel of the tester. Each of these memories is cycled to the next address to provide a new instruction for that channel, only when it is necessary to change the state of operation of that channel. Thus, the timing of the events on one channel are independent of the timing on the events of any other channel in the tester. The architecture permits the use of dynamic random access memory (DRAM) circuits and allows for backward looping in the test sequence through the use of a cache memory circuit in each channel. The instructions for operating each channel of the tester are context-dependent; that is, the present state of operation of that channel of the tester is utilized in interpreting the next instruction for that channel.
A method for operating a multichannel tester for an electronic circuit in which each channel operates independent of all other channels and has a test pin for contacting a test point of a unit under test and a pin memory circuit for storing instructions which determine a state of operation of said test pin, the method comprising cycling said pin memory circuit to a next address only when a new test instruction is required to change a state of operation of that channel independent of a state of operation of all other channels.
A method for operating a multichannel tester for an electronic circuit in which each channel operates independent of all other channels having in each channel a test pin for contacting a test point of a unit under test a pin memory circuit storing test instructions which determine a state of operation of said test pin, and a channel control circuit coupled between said test pin and an output of said pin memory circuit, the method comprising:
A method for operating a multichannel tester for an electronic circuit in which each channel operates independent of all other channels and has a test pin for contacting a test point of a unit under test and a pin memory circuit for storing instructions which determine a state of operation of said test pin, the method comprising cycling said pin memory circuit to a next address when a new test instruction is required to change a state of operation of that channel independent of a state of operation of all other channels.
A method for controlling the operation of a component or board test system having a central processor, a clock generator, and a plurality of operating channels;
Dependencies are inferred from the claim text.