Method for controlling propogation of data and transform through memory-linked wavefront array processor
AssigneeThe Johns Hopkins University
InventorQuentin E. Dolecek
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Abstract
A method for performing computations with an asynchronous linear array of multiple processing stages is disclsoed. The linear array comprises multiple processing stages interspersed with flow control flag mechanisms and with dual port linking memories. The method utilizes the flow control flag mechanisms between processing stages to control the flow of computations through the array.
Claims10
A method for controlling propagation of data and transforms through a linear array of multiple processing elements interspersed with linking dual port memories where each dual port memory can be accessed simultaneously and without contention by processing elements located on its left and right and where each processing element can be locally controlled by at least one flow control flag corresponding to each particular dual port memory located adjacent thereto and said flow control flag is selectively controlled by processing elements to the right and left of the dual port memory, said method comprising the steps of:
- propagating data and transforms through the array by performing the following steps with each processing element, (a) selectively accessing data from one of its adjacent dual-port memories;
- (b) transforming the data and (c) storing the transformed data in the other adjacent dual port memory;
- all as required by a program sequence stored in that processing element;
- and,
- controlling the propagation of data transforms through the array by performing the following steps with each processing element, (a) testing said at least one flow control flag as part of a program sequence instruction if required by the program sequence stored in that processing element;
- however, if such testing is not required by the program sequence, going directly to step (d) below;
- (b) suspending operation of the program sequence at that instruction if a tested flow control flag is false;
- (c) automatically and without further testing completing the instruction when all tested flow control flags are true;
- (d) continuing the program sequence to perform memory access, data transformation and propagation;
- and (e) changing a state of at least one flow control flag associated with that processing element's adjacent dual port memory as required by the program sequence stored in that processing element.
A method for controlling propagation of data and transforms through a multidimensional array of multiple processing elements interspersed with linking dual port memories where each dual port memory can be accessed simultaneously and without contention by processing elements located adjacent thereto and where each processing element can be locally controlled by at least one flow control flag corresponding to each particular dual port memory located adjacent thereto and said flow control flag is selectively controlled by adjacent processing elements, the said method comprising the steps of:
- propagating data and transforms through the array by performing the following steps with each processing element,
- (a) selectively accessing data from one of its adjacent dual-port memories;
- (b) transforming the data and (c) storing the transformed data in another adjacent dual port memory;
- all as required by a program sequence stored in that processing element;
- and,
- controlling the propagation of data transforms through the array by performing the following steps with each processing element, (a) testing said at least one flow control flag as part of a program sequence instruction if required by the program sequence stored in that processing element;
- however, if such testing is not required by the program sequence, going directly to step (d) below;
- (b) suspending operation of the program sequence at that instruction if a tested flow control flag is false;
- (c) automatically and without further testing completing the instruction when all tested flow control flags are true;
- (d) continuing the program sequence to perform memory access, data transformation and propagation;
- and (e) changing a state of at least one flow control flag associated with a dual port memory adjacent to that processing element as required by the program sequence stored in that processing element.
Dependencies are inferred from the claim text.