Capacitor coupled push pull logic circuit
AssigneeGazelle Microcircuits, Inc.
InventorsAndrew C. Graham, Mark E. Fitzpatrick
Life of this patent
Estimating the term…
Abstract
This invention discloses a push pull logic circuit which includes a capacitor connected to the output signal lead of the circuit, and also a plurality of diodes, in parallel with the capacitor and connected to the output signal lead.
Claims4
A buffer circuit having an input signal lead for receiving an input signal, an output signal lead for providing an output signal, a first voltage supply terminal, and a second voltage supply terminal, comprising:
- first, second and third transistors;
- said first transistor having a first current handling terminal, a control terminal, and a second current handling terminal connected to the second voltage supply terminal;
- load means connecting the first voltage supply terminal and first current handling terminal of the first transistor;
- said second transistor having a first current handling terminal connected to said first voltage supply terminal, a control terminal connected to the first current handling terminal of the first transistor, and a second current handling terminal;
- said third transistor having a first current handling terminal connected to the second current handling terminal of the second transistor, a control terminal, and a second current handling terminal connected to the second voltage supply terminal;
- the control terminals of the first and third transistors being connected to the input signal lead;
- a capacitor having a pair of terminals, one terminal connected to the first current handling terminal of the third transistor, and the other terminal connected to the output signal lead;
- and
- a load device coupled between the respective second current handling terminals of the first and third transistors and the second voltage supply terminal.
A buffer circuit having an input signal lead for receiving an input signal, an output signal lead for providing an output signal, a first voltage supply terminal, and a second voltage supply terminal, comprising:
- first, second and third transistors;
- said first transistor having a first current handling terminal, a control terminal, and a second current handling terminal connected to said second voltage supply terminal;
- load means connecting said first voltage supply terminal and said first current handling terminal of said first transistor;
- said second transistor having a first current handling terminal connected to said first voltage supply terminal, a control terminal connected to the first current handling terminal of the first transistor, and a second current handling terminal;
- said third transistor having a first current handling terminal connected to the second current handling terminal of the second transistor, a control terminal, and a second current handling terminal coupled to the second voltage supply terminal;
- the control terminals of the first and third transistors being connected to the input signal lead;
- a first load device connecting the first current handling terminal of the third transistor and the output signal lead;
- and
- further comprising a second load device connected between the respective second current handling terminals of the first and third transistors, and the second voltage supply terminal.
Dependencies are inferred from the claim text.