PSK modulation with an error correction memory

A modulation circuit comprising:

• a binary PSK (phase shift keying) modulator for modulating a variable frequency carrier with a digital signal of a selected one of a plurality of channels, said modulator having an inherent operating characteristic variable as a function of the frequency of said carrier;
• memory means for storing a plurality of first error correction values in first storage locations corresponding to said plurality of channels, each of said first correction values being representative of a first deviation of said inherent operating characteristic of said modulator when operating at a particular frequency of said carrier from a first predetermined operating characteristic and for storing a plurality of second error correction values in second storage locations corresponding to said plurality of channels, each of said second error correction values being representative of a second deviation of said inherent operating characteristic of said modulator when operating at said particular frequency of said carrier from a second predetermined operating characteristic;
• means for generating said carrier and varying the frequency thereof corresponding to the selected channel;
• means for addressing said memory means and reading a said first error correction value from one of said first storage locations corresponding to said selected channel and reading a said second error correction value from one of said second storage locations corresponding to said selected channel;
• first error correcting means for correcting said first deviation in response to said first error correction value read out of said memory means;
• and
• second error correcting means for correcting said second deviation in response to said second error correction value read out of said memory means.

A modulation circuit comprising:

• a first binary PSK (phase shift keying) modulator for modulating a first variable frequency carrier with a digital signal of a first selected one of a plurality of channels;
• a second binary PSK modulator for modulating a second variable frequency carrier with a digital signal of a second selected one of said plurality of channels, said second variable frequency carrier having the same frequency as said first carrier and being phase shifted with respect thereto by 90 degrees, said PSK modulators having inherent operating characteristics variable respectively as a function of the frequency of said first and second variable frequency carriers;
• means for generating said first and second variable frequency carriers and varying the frequencies thereof corresponding to the selected channels;
• memory means for storing a plurality of sets of first, second and third error correction values in storage locations corresponding to said plurality of channels, said first and second error correction values being representative of deviations of said inherent operating characteristics of said first and second PSK modulators when operating at a particular frequency of said carriers from predetermined operating characteristics, and said third error correction value being representative of a phase deviation of one of said modulators at said particular frequency from a predetermined phase;
• means for addressing said memory means and reading a set of said first, second and third error correction values from one of said storage locations corresponding to said selected channels;
• first error correcting means for correcting the operating characteristics of said first PSK modulator in response to said first error correction value read out of said memory means;
• second error correcting means for correcting the operating characteristics of said second PSK modulator in response to said second error correction value read out of memory means;
• and
• a variable phase shifter for shifting the phase of one of said first and second variable frequency carriers in response to said third error correction value read out of said memory means.

A modulation circuit comprising:

• a binary PSK (phase shift keying) balanced modulator having two signal input ports and a carrier input port to which a variable frequency carrier is supplied for modulating said variable frequency carrier with a digital signal of a selected one of a plurality of channels, said modulator having an inherent operating characteristic variable as a function of the frequency of said carrier;
• memory means for storing a plurality of digital error correction signals in storage locations corresponding to said plurality of channels, each of said error correction signals being representative of a deviation of said inherent operating characteristic of said modulator when operating at a particular frequency of said carrier from a predetermined operating characteristic;
• means for generating said carrier and varying the frequency thereof corresponding to the selected channel;
• means for addressing said memory means and reading an error correction signal from one of said storage locations corresponding to said selected channel;
• a digital-to-analog converter for converting the digital error correction value read out of said memory means into an analog error correction signal;
• and
• first summing means for summing said analog error correction signal with said carrier at said carrier input port of the PSK balanced modulator;
• and
• second summing means for differentially summing the digital signal of said selected channel with a constant bias potential and supplying differentially summed signals to said signal input ports of the PSK balanced modulator.