Correlation detecting circuit operable in a low frequency

A correlation detecting circuit for use in an adaptive equalizer system comprising a transversal filter for filtering a received signal into an equalized signal in response to a plurality of controllable tap gains and a demodulator for demodulating said equalized signal into a reproduced clock signal, a reproduced data sequence, and a digital error signal, said received signal carrying a transmission data sequence digitized by a reference clock signal, said reproduced clock signal being a reproduction of said reference clock signal, said reproduced data sequence being a reproduction of said transmission data sequence, said digital error signal being related to said reproduced data sequence, said correlation detecting circuit including logic operation carrying out means for carrying out an exclusive logic operation on a plurality of input signals derived from said reproduced clock signal, said reproduced data sequence, and said digital error signal to produce a plurality of correlation signals which represent cross-correlation between said reproduced data sequence and said digital error signal and are collectively used in controlling said controllable tap gains, wherein the improvement comprises:

• divider means for frequency dividing said reproduced clock signal to produce a divided clock signal;
• and
• serial-parallel converting means coupled to said divider means and responsive to said digital error signal and to said reproduced data sequence for converting said digital error signal and said reproduced data sequence into said input signals in synchronism with said divided clock signal.