US 4,908,818 AGranted

Multiplex communication arrangement capable of selectively monitoring active multiplexers and of simultaneously checking an input to a stand-by demultiplexer

AssigneeNEC Corporation

InventorOsamu Kawano

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Abstract

In a multiplex communication arrangement of an N:1 redundancy configuration, each multiplexer comprises a multiplexing circuit for multiplexing a plurality of multiplexer input signals into a multiplexed signal and an encoder for encoding the multiplexed signal into an encoded signal of self-checking codes, such as the known CRC codes. Into a decoder output signal, a decoder of each demultiplexer decodes a demultiplexer input signal which is in a form of the self-checking codes. As a selected signal, a selector selects one of the decoder output signal and the multiplexed signal produced in one of the multiplexers, (N+1) in number, that the selector selects as a selected multiplexer. A demultiplexing circuit demultiplexes the selected signal into a plurality of demultiplexer output signals. A bit-by-bit comparator compares the multiplexer input signal of the selected multiplexer with the demultiplexer output signals which are produced in one of the demultiplexers, (N+1) in number, for the multiplexed signal produced in the selected multiplexer. Inasmuch as such demultiplexer produces the demultiplexer output signals for a utilization device when the demultiplexer in question is an active one, it follows that the above-mentioned one of the demultiplexers is a stand-by one.

Claims4

Dependent claims

A multiplex communication arrangement which comprises:

(A) N+1 multiplexers, N being a positive integer greater than 1, each multiplexer being for connection to a respective transmission channel and comprising a multiplexing circuit for multiplexing a plurality of multiplexer input signals applied thereto into a multiplexed signal and an encoder for encoding said multiplexed signal into an encoded signal of self-checking codes for transmission to its respective said transmission channel;
(B) N+1 demultiplexers each for connection to a respective reception channel, each demultiplexer comprising:
(1) a decoder for decoding a demultiplexer input signal applied thereto into a decoder output signal, said demultiplexer input signal being in a form of said self-checking codes and being received through its respective reception channel, said decoder checking for errors in said demultiplexer input signal applied thereto;
(2) a selector for selecting, as a selected signal, one of said decoder output signal and the multiplexed signal produced by one of said multiplexers that said selector selects as a selected multiplexer;
and
(3) a demultiplexing circuit for demultiplexing said selected signal into a plurality of demultiplexer output signals;
and
(C) a comparator for carrying out bit by bit comparison of the multiplexer input signals of said selected multiplexer with the demultiplexer output signals which are produced from one of said demultiplexers for the multiplexed signal produced in said selected multiplexer.

5 more elements

Dependencies are inferred from the claim text.