Image data output apparatus
AssigneeVictor Company of Japan, Ltd.
InventorTooru Yamagishi
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AssigneeVictor Company of Japan, Ltd.
InventorTooru Yamagishi
Estimating the term…
An image data output apparatus having a plurality of memories, a plurality of latch circuits corresponding in number to the memories, a data selector, and a timing pulse generator. A plurality of pixel data corresponding to a plurality of pixels constituting an image are stored in the memories. A plurality of read clock signals having different timings are supplied from the timing pulse generator to the memories to read pixel data from the memories at different timings. The read-out pixel data are applied at different timings to the latch circuits. A plurality of latch signals having different timings are supplied from the timing pulse generator to the latch circuits to thereby make definite the pixel data at the latch circuits at different timings. The definite pixel data are supplied to the data selector to which a select signal from the timing pulse generator is applied. Thus, the pixel data are sequentially outputted one after another from the data selector.
A image data output apparatus wherein a plurality of read clock signals from a timing pulse generator are sequentially applied one after another to a plurality of memories to read out therefrom each one of a plurality of pixel data stored therein corresponding to a plurality of pixels constituting an image, said plurality of read-out pixel data are applied to latch circuits to latch said read-out pixel data upon application of latch signals from the timing pulse generator to the latch circuits, and a plurality of said latched pixel data are applied to a data selector to serially output the plurality of latched pixel data therefrom upon application of data selector signals from the timing pulse generator to the data selector, the:
Dependencies are inferred from the claim text.