System for printed circuit board testing

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• means for providing a high impedance in the test probe to minimize loading of the PCB at said test nodes;
• a transmission line electrically coupling each test signal from its respective test probe to an input of the multiplexer;
• and
• means for terminating the transmission line in a termination impedance substantially equal to a characteristic impedance of the transmission line.

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• the test signal transmission means including a transmission line electrically coupling each test probe to an input of the multiplexer and means for terminating the transmission line in a termination impedance substantially equal to a characteristic impedance of the transmission line.

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• the test signal transmission means including a transmission line and an input impedance means at the test probe defining a resistance and capacitance having a time constant that is substantially less than a minimum pulse width of the test signals, the resistance being greater than a characteristic impedance of the transmission line.

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• the multiplexing means including delay means for matching automatically, under algorithmic control, a relative timing of the test signals input to the analyzer with a relative timing of the signals sensed at the test nodes.

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• and
• transmission means including a transmission line for transmitting each signal to the multiplexing means with substantially the same AC characteristics as the characteristics of the signals at the test nodes.

A system for testing a printed circuit board (PCB) having a plurality of test nodes, comprising:

• a test probe means for contacting a test node to sense a test signal on the PCB;
• a test instrument means having an input for receiving and analyzing said test signal;
• means for providing a high input impedance in the test probe to minimize loading of the PCB at said test node;
• means for regenerating the test signal for input to the test instrument means;
• a transmission line electrically coupling the test probe to an input of the regenerating means;
• the regenerating means having a high input impedance such that there is substantially no current flowing through the input of the regenerating means.

A system for testing a printed circuit board (PCB) having a plurality of test nodes, comprising:

• a test probe means for contacting a test node to sense a test signal on the PCB;
• a test instrument means having an input for receiving and analyzing said test signal;
• means for providing a high input impedance in the test probe to minimize loading of the PCB at said test node;
• means for regenerating the test signal for input to the test instrument means;
• a transmission line electrically coupling the test probe to an input of the regenerating means;
• and
• means for terminating the transmission line in a termination impedance substantially equal to a characteristic impedance of the transmission line;
• the termination impedance being connected to a predetermined terminating voltage.

A system for testing a printed circuit board (PCB) having a plurality of test nodes, comprising:

• a test probe means for contacting a test node to sense a test signal on the PCB;
• a test instrument means having an input for receiving and analyzing said test signal;
• means for providing a high input impedance in the test probe to minimize loading of the PCB at said test node;
• means for regenerating the test signal for input to the test instrument means;
• a transmission line electrically coupling the test probe to an input of the regenerating means;
• and
• delay means for adjusting automatically, under algorithmic control, a propagation delay of the signal sensed at the test node from the test probe to the test instrument input.

A method for testing printed circuit boards having a first plurality of test nodes, comprising:

• providing a test fixture having a second plurality of test probes for sensing electrical test signals at said test nodes;
• providing a test instrument having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same;
• transmitting each of the sensed test signals to a high input impedance regenerating means for producing a second plurality of regenerated test signals with minimal transient loading of the test nodes and minimal transient distortion of the test signals;
• multiplexing the number of regenerated test signals from said second plurality down to a reduced number;
• and
• inputting the reduced number of test signals to the test instrument inputs
• with minimal skewing of the relative timing of the test signals so that the real-time behavior of the test signals can be accurately observed and analyzed.

A method of testing a printed circuit board which can have a large number of test nodes to a test instrument having a lesser number of inputs for analyzing test signals present at said test nodes, comprising:

• connecting a multi-probe test fixture to the printed circuit board with a test probe in contact with each test node of interest;
• providing a multiplexer subsystem having a number of outputs coupled in one-to-one correspondence to the test instrument inputs to be used and having multiple inputs coupled to the test probes and alternative signal paths selectably coupled to each multiplexer subsystem output;
• providing an adjustable delay in each output of the multiplexer subsystem;
• selecting a subset of said multiple inputs and alternative signal paths for transmitting selected test signals from the test nodes to the test instrument inputs to multiplex the number of input test signals down to a reduced number of output signals matching the number of test instrument inputs in use;
• and
• adjusting automatically, under algorithmic control, relative propagation delay of the selected signal paths through the multiplexer subsystem.

A system for testing printed circuit boards having a first plurality of test nodes, comprising:

• a test fixture having a second plurality of test probes for sensing electrical test signals at said test nodes;
• a test instrument having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same;
• multiplexing means coupled between the test fixture and the test instrument for selecting among a number of alternative test signal paths for transmitting said test signals from the test probes to the test instrument inputs and reducing the number of test signals from said second plurality down to a reduced number not exceeding said third plurality of test instrument inputs;
• adjustable delay means in each signal path for imparting automatically, under algorithmic control, a predetermined relative delay to the test signals;
• and
• delay determining means for determining automatically, under algorithmic control, the delay in each signal path.

A system for high performance testing of a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB, including test signals having high frequency components;
• a high speed test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same, the second plurality being substantially larger than the third plurality;
• multiplexing means interconnecting the test fixture and the analyzer for multiplexing said number of test signals sensed by the test probes down to a number not exceeding said third plurality for input to the analyzer;
• test signal transmission means coupled to each test probe for transmitting each of said test signals from the respective test node through the multiplexing means to one of said inputs of the analyzer;
• means for providing a high impedance in the test probe to minimize loading of the PCB at said test nodes;
• and
• a transmission line electrically coupling each test probe to an input of the multiplexer;
• the multiplexing means including means for amplifying each test signal.

A system for testing a printed circuit board (PCB) having a first plurality of test nodes, comprising:

• a multiprobe test fixture having a second plurality of test probes for contacting said test nodes to sense a number up to said first plurality of test signals on the PCB;
• a test signal analyzer having a third plurality of inputs for simultaneously receiving a number of said test signals and analyzing same;
• and
• crossbar signal switching means interconnecting the test fixture and the analyzer for coupling the test signals to analyzer inputs;
• the crossbar signal switching means having at least two test signal inputs coupled in one to one correspondence to a like number of the test probes and at least two outputs coupled to the analyzer inputs and being arranged to output one of the test signal inputs to one or the other or both of said two outputs.