Input circuit having improved noise immunity

In an improved electronic integrated input circuit of the type having Complementary Metal Oxide Silicon (CMOS) transistors forming an input circuit, said input circuit having a plurality of inverters with each inverter having an MOS transistor of the P type and an MOS transistor of the N type, with the gate of the P-type transistor connected to an input node, its drain connected to a positive voltage source, its source connected to the drain of the N-type MOS transistor and to an output node, with the output node being the output of said inverter, the gate of the N-type MOS transistor being connected to the input node and the source of said N-type MOS transistor being connected to a ground potential;

• wherein said improvement comprising:
• a first MOS transistor means of the N type having a source, a drain, and a gate with the source connected to said ground potential, and the drain connected to the output node of said inverter;
• first means for capacitively coupling a ground transient to the gate of said first MOS transistor;
• and
• first pass transistor means for providing AC isolation between said input node and the gate of said first MOS transistor means.