Integrated processing unit, particularly for connected speech recognition systems

A microprogrammed processing unit constituting the lower level of a two-level processing system, and comprising an interface circuit (INTBUS) for controlling two-way dialogue between the said unit and the higher level via two-way external control buses (BC), data buses (BD) and address buses (BA) also connected to an external data memory (MEME) accessed by both the said unit and the said higher level, and comprising a microinstruction sequencing unit (SEQ) supplying the microinstructions onto internal buses (CTRL, PPBUS), said microprogrammed processing unit comprising:

• a connection circuit (IOREG) for transferring data from the said external data bus (BD) onto a first internal bus (BUSIN), or from a second internal bus (BUSOUT) onto the said external data bus, said first and second external buses being of the precharge type;
• an arithmetical-logic unit (ALU) for receiving a first operand on the said first internal bus (BUSIN) and a second operand on the said second internal bus (BUSOUT), adding, subtracting, comparing or determining the minimum of the said first and second operands, and supplying the result on the said first or second internal bus;
• a first read and write internal data memory (RAMI) organized in four banks (B0, B1, B2, B3) and which is loaded with the data on the said first internal bus (BUSIN) and supplies data onto the said second internal bus (BUSOUT);
• a circuit (MEMI) for addressing the said first internal memory, which circuit provides for cyclically addressing words in the said first and second banks (B0, B1), addressing each bit in the said third bank (B2), and addressing words in the said fourth bank (B3);
• a unit (ADR) for addressing the said external data memory (MEME) which is organized in tables consisting each of a specific number of word blocks;
• the said unit calculating a generic word address according to the sum of three terms:
• the location address of the first word in the table and present in a second internal memory (MEMIN);
• the address of the start block location in the table and present in a third internal memory (MEMOF);
• and the word location within the block;
• said addresses being supplied on the external address bus (BA).