Vehicle multiplex system

A time division multiples system in which data signals are adapted to be sent through the system in cyclical fashion during each of a series of time periods, comprising:

• a communication line;
• a master unit connected to said communication line and including timing signal-generating circuitry for sending a plurality of timing signals out over said line for defining a plurality of time slots during each time period;
• a plurality of transceivers connected to said communication line, each of said transceivers being connected to a load and including:
• an address-decoding circuit for separating said timing signals on said line from other signals on said line and for producing a first output signal indicative of the presence of a selected time slot on said line during each time period;
• a data-signal-transmitting circuit for sending a data signal out onto said line during said selected time slot of each time period when said transceiver is operated in a transmit mode;
• and
• a data-signal-receiving circuit for receiving a data signal from said line during said selected time slot of each time period when said transceiver is operated in a receive mode, said data-signal-receiving circuit including a data signal separator circuit for separating data signals from other signals on said line and for producing a second output signal indicative of the presence of data signals on said line,
• said data-signal-transmitting circuit and said data-signal-receiving circuit including a common gate having a first gate input connected to the output of said address-decoding circuit and having a second gate input selectively connected to either said data separator circuit when said transceiver is being operated in a receive mode for providing a gate output signal when said first and second signals are received at said first and second gate inputs indicative of the presence of a data signal on said line in said selected time slot to permit control of said load, or to a signal input means when said transceiver is being operated in a transmit mode for providing a gate output signal when said first signal and said gate input signal are received at said first and second gate inputs to permit a data signal indicative of the condition of said load to be placed onto said line during said selected time slot.

A transceiver for a time division multiplex system which includes a communication line over which data signals are adapted to be sent through the system in cyclical fashion during each of a series of time periods, and timing means for sending a plurality of timing signals over said line for defining a plurality of time slots during each time period during which data signals can be sent over said line, said transceiver being adapted to be connected to said communication line and being selectively operable in either a transmit mode or in a receive mode and including:

• an address-decoding circuit for identifying a selected one of said plurality of time slots on said line during each time period, said address-decoding circuit including means for providing an output signal indicative of said selected time slot;
• a data-receiving circuit operable when said transceiver is in a receive mode for receiving a data signal from said line during said selected time slot, said data-receiving circuit including a data separator circuit for separating data signals on said line from others signals on said line, and a gate having a first input connected to said output signal providing means and a second input connected to the output of said data separator circuit when said transceiver is operated in a receive mode for providing a gate output signal when a signal is received at both said first and second gate inputs indicative of the presence of a data signal on said line in the selected time slot;
• and
• a data-transmitting circuit operable when said transceiver is in a transmit mode for sending a data signal onto said line during said selected time slot, said data-transmitting circuit also including said gate, and wherein said second gate input is connected to a signal input means when said transceiver is operated in a transmit mode for providing a gate output signal when a signal is received at both said first and second gate inputs, and means coupled to said gate output for sending a data signal onto said line during said selected time slot.