Program-controlled computer with an interrupt capability for floating-point operation
AssigneeHitachi, Ltd.
InventorYukio Umetani
Life of this patent
Estimating the term…
Abstract
A program-controlled computer includes a first unit for executing an addition or a substraction on a first floating-point data and a second floating-point data inputted thereto, a second unit for receiving the exponents of the first and second floating-point data, for determining whether or not an absolute value of a difference between the exponents exceeds a predetermined value defined as a number of digits of a mantissa of the first or second floating-point data, and for generating an interrupt signal when the absolute value exceeds the number of digits, and third unit connected to the second unit for interrupting a program being executed in response to the interrupt signal so as to execute an interrupt processing program associated with the interrupt signal.
Claims2
A program-controlled computer comprising:
- first means for effecting a floating-point addition operation or a floating-point subtraction operation on first floating-point data and second floating-point data each inputted thereto;
- second means for receiving an exponent of the first floating-point data and an exponent of the second floating-point data, for determining whether or not an absolute value of a difference between said exponents exceeds a predetermined value defined as a number of digits of a mantissa of the first or second floating-point data, and for generating an interrupt signal to indicate detection of a left-off state when the absolute value exceeds the number of digits;
- and
- third means connected to said second means for interrupting a program being executed in response to said interrupt signal so as to execute an interrupt processing program associated with said interrupt signal.
Dependencies are inferred from the claim text.