Semiconductor integrated circuit
OwnerTadahiro Ohmiinventor
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes an insulated-gate transistor serving as a driving transistor and composed of source and drain regions of one conductivity type with a high impurity concentration, a channel region disposed between the source and drain regions, an insulating layer covering the substantially entire surface of the channel region except for portions adjacent to the source and drain regions, the insulating layer which covers the channel region having at least a thinner portion, and a gate electrode of a conductive material disposed adjacent to the thinner portion of the insulating layer and having a high diffusion potential with respect to the source region.
Claims36
A semiconductor integrated circuit comprising an insulated-gate transistor serving as a driving transistor and composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the entire surface of said channel region except for portions adjacent to said source and drain regions, said insulating layer having at least a thinner portion, and a gate electrode of a conductive material disposed adjacent the thinner portion of said insulating layer for maintaining said channel region substantially in floating condition, the impurity concentration N of the channel region having a relation of N<D.sup.-3 with respect to the depth D of the channel.
A semiconductor integrated circuit comprising an insulated-gate transistor serving as a driving transistor and composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the almost entire surface of said channel region except for portions adjacent to said source and drain regions, said insulating layer having at least a thinner portion, and a gate electrode of a conductive material disposed adjacent the thinner portion of said insulating layer for maintaining said channel region substantially in floating condition, the impurity concentration N of the channel region having a relation of N<D.sup.-3 with respect to the depth D of the channel.
A semiconductor integrated circuit comprising two complementary insulated-gate transistors of different conductivity types having drain electrodes directly connected to each other and gate electrodes directly connected to each other, the connected gate electrodes serving as an input terminal and the connected drain electrodes serving as an output terminal, each of said insulated-gate transistors being composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the entire surface of said channel region except for portions adjacent to said source and drain regions, the insulating layer which covers said channel region having at least a thinner portion, and a gate electrode of a conductive material disposed adjacent to the thinner portion of said insulating layer for maintaining said channel region substantially in floating condition, the impurity concentration N of the channel region having a relation of N<D.sup.-3 with respect to the depth D of the channel.
A semiconductor integrated circuit comprising two complementary insulated-gate transistors of different conductivity types having drain electrodes directly connected to each other and gate electrodes directly connected to each other, the connected gate electrodes serving as an input terminal and the connected drain electrodes serving as an output terminal, each of said insulated-gate transistors being composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the almost entire surface of said channel region except for portions adjacent to said source and drain regions, the insulating layer which covers said channel region having at least a thinner portion, and a gate electrode of a conductive material disposed adjacent to the thinner portion of said insulating layer for maintaining said channel region substantially in floating condition, the impurity concentration N of the channel region having a relation of N<D.sup.-3 with respect to the depth D of the channel.
A semiconductor integrated circuit comprising an insulated-gate transistor serving as a driving transistor and composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the entire surface of said channel region except for portions adjacent to said source and drain regions, said insulating layer having at least two thinner portions, and at least two gate electrodes of a conductive material disposed adjacent these thinner portions of said insulating layer for maintaining said channel region substantially in floating condition.
A semiconductor integrated circuit comprising two complementary insulated-gate transistors of different conductivity types having drain electrodes directly connected to each other and gate electrodes directly connected to each other, the connected gate electrodes serving as an input terminal and the connected drain electrodes serving as an output terminal, each of said insulated-gate transistors being composed of source and drain regions of one conductivity type and a high impurity concentration, a channel region disposed between said source and drain regions, an insulating layer covering the entire surface of said channel region except for portions adjacent to said source and drain regions, the insulating layer which covers said channel region having at least two thinner portions, and at least two gate electrodes of a conductive material disposed adjacent to these thinner portions of said insulating layer for maintaining said channel region substantially in floating condition.
Dependencies are inferred from the claim text.