Analog-to-digital converter with offset voltage polarity inversion

An integrating analog-to-digital converter comprising amplifier means coupled to capacitor means;

• analog signal input means;
• control means for:
• (a) connecting said analog signal input means to said capacitor means for a first predetermined period of time to cause a first current to charge said capacitor means, said first current being a function of the level of said analog signal and the level of error signal in said amplifier means, and (b) connecting said analog signal input means to said capacitor means for a second predetermined period of time to cause a second different current to charge said capacitor means, said second current being a function of the level of said analog signal and an invert of the level of error signal in said amplifier means, whereby the average charging current over the first and second periods of time is a function of the level of said analog signal substantially unaffected by the level of said error signal;
• and means to provide a digital output signal which is a function of said average charging current.

A dual slope analog to digital converter comprising amplifier means coupled to capacitor means;

• means for connecting an analog signal to said amplifier means to cause a current which is a function of the level of said analog signal to charge said capacitor means for a predetermined time period;
• means for connecting a reference signal to said amplifier means to cause a constant current to discharge said capacitor means for a time period which is a function of the charge stored by said capacitor during said predetermined time period;
• said amplifier means having offset potential associated therewith, said offset potential affecting said charging current and said discharging current;
• and switching means to reverse the direction of effect of said offset potential on the charging current during the charging of said capacitor means so that the capacitor means is charged at a first higher rate during one portion of said time period and at a second lower rate during a second portion of said time period such that the average charging current is substantially unaffected by said offset potential, and means for providing a digital output signal which is a function of said charge by said capacitor means during said predetermined period of time.

A method of analog-to-digital conversion comprising the steps of:

• charging a capacitor for substantially one-half of a predetermined time period with a current which is a function of the level of an analog signal and the level of an error signal;
• charging said capacitor for the remainder of said predetermined time period with a current which is a function of said level of said analog signal and the invert of the level of said error signal so that said capacitor reaches a level of charge which is a function of said level of said analog signal substantially unaffected by the level of said error signal;
• discharging said capacitor at a rate which is a function of a reference voltage;
• and
• producing a digital signal which is a function of the time required to discharge said capacitor.

A method of analog-to-digital conversion comprising the steps of:

• charging a capacitor for substantially one half of a first predetermined time period with a current which is a function of the level of an analog signal and the level of an error signal;
• charging said capacitor for the remainder of said predetermined first time period with a current which is a function of said level of said analog signal and the invert of the level of said error signal so that said capacitor reaches a level of charge which is a function of said level of said analog signal substantially unaffected by the level of said error signal;
• discharging said capacitor at a first rate of discharge which is a function of a reference voltage and the level of said error signal;
• charging said capacitor for substantially one-half of a predetermined second time period with a current which is a function of the level of said analog signal and the level of said error signal;
• charging said capacitor for the remainder of said predetermined second time period with a current which is a function of said level of said analog signal and the invert of the level of said error signal so that said capacitor reaches a level of charge which is a function of said level of said analog signal substantially unaffected by said error signal;
• discharging said capacitor at a second rate of discharge which is a function of said reference voltage and the invert of the level of said error signal;
• and
• producing a digital signal which is a function of the time required to discharge said capacitor said first and second times.