Time-frequency multiplexing system for correcting output amplitude of a tuned circuit due to impedance drift

An electronic circuit for correcting voltage amplitude response changes due to resistance in a tuned circuit comprising:

• a clock oscillator means generating two discrete frequencies, one a high frequency and one a low frequency;
• a frequency selection means to select, upon receiving a command, one of the two frequencies of the said clock oscillator;
• a waveform generator;
• a waveform period counter which switches between one of two states corresponding to said high frequency and said low frequency of said clock oscillator;
• a sample and hold counter control operatively connected to said waveform period counter;
• a first sample and hold amplifier;
• a second sample and hold amplifier;
• a constant current coil driver circuit driving a tuned circuit;
• a first differential amplifier;
• and
• a second differential amplifier;
• wherein said clock oscillator means is operatively connected to the frequency selection means, and said frequency selection means alternatively selects said high and low frequency from said oscillator means to introduce such frequency into the waveform generator, said waveform generator producing a frequency output proportional to said selected high or low frequency and introducing said proportional output to the said coil driver constant current circuit, and also to said waveform period counter;
• wherein said constant current driver further provides a constant current to said tuned circuit, said tuned circuit having an output being placed across the inputs of said first differential amplifier such that the output of said first differential amplifier represents the voltage across said tuned circuit;
• the output of said first differential amplifier being introduced to the input of said first and second sample and hold amplifiers, said first sample and hold amplifier driving an inverting input of said second differential amplifier and said second sample and hold amplifier driving a non-inverting input of said second differential amplifier;
• wherein said first and second sample and hold amplifiers are further commanded to sample and hold by said sample and hold counter control in a manner corresponding to said high frequency and said low frequency of said clock oscillator means.