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AssigneeKabushiki Kaisha Toshiba
InventorTakashi Ohsawa
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An intermediate potential generation circuit for outputting an intermediate potential intermediate between a power source potential and ground potential, including a reference potential generator circuit for generating first and second reference potentials, and a comparator circuit for comparing the intermediate output with the first and second reference potentials. When the intermediate output potential is lower than the first reference potential, the comparator circuit outputs a first control signal at the level of the power source potential to a first MOS transistor supplied with the power source potential to raise the intermediate output potential level. When the output intermediate potential is higher than the second reference potential, the comparator circuit outputs a second control signal at the level of the power source potential to a second MOS transistor supplied with ground potential to lower the intermediate output potential.
An intermediate potential generation circuit for outputting at an output node an intermediate potential intermediate between a first power source potential and a second power source potential, comprising:
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