Path memory control method in Viterbi decoder
AssigneeKabushiki Kaisha Toshiba
InventorsHideo Suzuki, Masato Tajima
Life of this patent
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Abstract
A path memory control method in a Viterbi decoder outputs, when a plurality of decoding steps are required to trace back to a final stage of a surviving path, the same number of decoded data as that of the decoding steps required for trace-back, thereby determining the decoded data. During trace-back, state transition information throughout a plurality of times can be combined with each other, and the final stage of the surviving path can be traced back by jumping back a plurality of stages, at a time, by reducing the number of memory access, thereby realizing high-speed decoding.
Claims6
A path memory control method of a Viterbi decoder comprising the steps of:
- storing state transition information between a predetermined time and a time, as a surviving path, in a path memory circuit in accordance with a unit cell structure of a code trellis diagram;
- determining decoding data by a trace back on the basis of the state transition information which is stored in the path memory circuit;
- and
- outputting encoding data, corresponding in number to the plurality of decoding steps, from the path memory circuit, at a time when a plurality of decoding steps are required in a trace back to a final stage on the surviving path.
Dependencies are inferred from the claim text.