Semiconductor integrated circuit device

A semiconductor integrated circuit device comprising:

• dynamic memory cells that need to be periodically refreshed;
• a decoder circuit for selecting predetermined ones of said dynamic memory cells;
• an address buffer;
• a refresh circuit including:
• a program circuit which comprises a program element to be preprogrammed, said program circuit including means for generating an output signal according to a condition of said program element,
• a timer circuit coupled to said program circuit for producing output signals whose pulse period varies depending upon said output signal of said program circuit, and
• an address counter for counting the output signals of said timer circuit to form address signals;
• means for forming a control signal which controls a multiplexer, wherein said multiplexer is coupled to said address buffer and to said refresh circuit for supplying to said decoder circuit an address signal produced either by said address buffer or by said address counter in accordance with said control signal, so that said multiplexer supplies to said decoder circuit the address signal produced by said address counter when dynamic memory cells specified by said address counter are to be refreshed;
• and
• terminals coupled to said program circuit for receiving signals for programming said program element.

A semiconductor integrated circuit device comprising:

• a memory array including dynamic memory cells that need to be periodically refreshed, said dynamic memory cells being arranged in the form of a matrix;
• a row decoder circuit for selecting one of memory cell rows in said memory array;
• an address buffer;
• a refresh circuit which comprises:
• a program circuit which comprises a program element to be programmed, wherein said program circuit includes means for generating an output signal according to a condition of said program element,
• a timer circuit coupled to said program circuit for producing output signals whose pulse period varies depending upon said output signal of said program circuit, and
• an address counter which counts the output signals of said timer circuit to form address signals;
• means for forming a control signal which controls a multiplexer, wherein said multiplexer is coupled to said refresh circuit for supplying to said row decoder circuit an address signal produced either by said address buffer or by said address counter in accordance with said control signal, so that said multiplexer supplies to said row decoder circuit the address signal produced by said address counter when dynamic memory cells specified by said address counter are to be refreshed;
• and
• terminals coupled to said program circuit for receiving signals for programming said program element.

A semiconductor integrated circuit device comprising:

• dynamic memory cells that need to be periodically refreshed;
• a latch circuit for storing control data;
• an external terminal coupled to said latch circuit and to be supplied with said control data at a time when said control data is fed to said latch circuit;
• and
• a timer circuit for generating output signals to determine a refresh timing of said dynamic memory cells, and which is coupled to said latch circuit so that the period of said output signals varies depending upon the stored control data in said latch circuit.

A memory circuit device comprising:

• dynamic memory cells that need to be periodically refreshed;
• a timer circuit for generating output signals to determine a refresh timing of said dynamic memory cells, said timer circuit having fuse means for changing the period of said output signals, so that the period of said output signals varies depending upon a condition of said fuse means;
• and
• terminals coupled to said fuse means and to be supplied with a melting voltage at a time when said fuse means is melted to alter the condition thereof.