Pattern generator having plural pattern generating units executing instructions in parallel

A pattern generator for executing a series of input or original operation processing instructions input thereto to generate a test pattern, comprising:

• first to N-th pattern generator units each including arithmetic logical operation means for executing a series of operation processing instructions;
• sequential output circuit means, coupled to outputs of said first to N-th pattern generator units and responsive to clock pulses, for sequentially selecting one of the outputs of said first to N-th pattern generator units in synchronism with said clock pulses, said sequentially selected outputs providing said test pattern;
• and
• memory means disposed in each of said first to N-th pattern generator units and connected to respective arithmetic logical operation means, for storing information including a series of new operation processing instructions, each of said new operation processing instructions being obtained by putting together operation processing instructions, N by N, taken from said series of input or original operation processing instructions and stored in an order according to which said series of input or original operation processing instructions are to be executed if said series of input or original operation processing instructions were serially executed.