Gated high stability LC stabilized oscillator
AssigneeNorth American Philips Corporation
InventorDavid C. Greene
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Abstract
A gated oscillator circuit for generating a sampling signal for digitally processing television signals, uses an LC oscillator to achieve, high frequency stability and reduced edge jitter. Circuitry is provided on both sides of a tank circuit in the oscillator for decoupling the tank circuit from other active circuit elements thereby enhancing the frequency stability.
Claims9
A gated LC stabilized oscillator circuit having high stability for generating a sampling clock signal for digital signal processing, including:
- an LC oscillator;
- means for controlling loading on said LC oscillator;
- and
- gate means for starting and stopping oscillations of said LC oscillator, wherein said LC oscillator is a Colpitts oscillator comprising a buffer amplifier and an LC tank circuit coupled between an input and an output of said buffer amplifier, said output of said buffer amplifier forming an output of said oscillator, and wherein said means for controlling the loading on said oscillator comprises a first parallel arrangement of a resistor and a capacitor coupled between said output of said buffer amplifier and said tank circuit.
A gated stabilized oscillator circuit having high stability for generating a sampling clock signal for a digital television signal processor, comprising:
- a transistor having a base, an emitter and a collector, a bias potential being applied to said collector;
- an inductor;
- a pair of capacitors connected, respectively, between a first and a second end of said inductor and ground;
- a first parallel arrangement of a resistor and a capacitor coupled between said emitter of said transistor and the first end of said inductor;
- a second parallel arrangement of a resistor and a capacitor coupled between the second end of said inductor and said base of said transistor;
- and
- a NAND-gate having a first input and an output connected respectively between said emitter of said transistor and said first parallel arrangement, a second input of said NAND-gate receiving a gate signal for starting and stopping oscillations of said oscillator circuit.
Dependencies are inferred from the claim text.